1#[doc = "Register `CONF1` reader"]
2pub type R = crate::R<CONF1_SPEC>;
3#[doc = "Register `CONF1` writer"]
4pub type W = crate::W<CONF1_SPEC>;
5#[doc = "Field `RXFIFO_FULL_THRHD` reader - It will produce rxfifo_full_int interrupt when receiver receives more data than this register value."]
6pub type RXFIFO_FULL_THRHD_R = crate::FieldReader<u16>;
7#[doc = "Field `RXFIFO_FULL_THRHD` writer - It will produce rxfifo_full_int interrupt when receiver receives more data than this register value."]
8pub type RXFIFO_FULL_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9#[doc = "Field `TXFIFO_EMPTY_THRHD` reader - It will produce txfifo_empty_int interrupt when the data amount in Tx-FIFO is less than this register value."]
10pub type TXFIFO_EMPTY_THRHD_R = crate::FieldReader<u16>;
11#[doc = "Field `TXFIFO_EMPTY_THRHD` writer - It will produce txfifo_empty_int interrupt when the data amount in Tx-FIFO is less than this register value."]
12pub type TXFIFO_EMPTY_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
13#[doc = "Field `DIS_RX_DAT_OVF` reader - Disable UART Rx data overflow detect."]
14pub type DIS_RX_DAT_OVF_R = crate::BitReader;
15#[doc = "Field `DIS_RX_DAT_OVF` writer - Disable UART Rx data overflow detect."]
16pub type DIS_RX_DAT_OVF_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `RX_TOUT_FLOW_DIS` reader - Set this bit to stop accumulating idle_cnt when hardware flow control works."]
18pub type RX_TOUT_FLOW_DIS_R = crate::BitReader;
19#[doc = "Field `RX_TOUT_FLOW_DIS` writer - Set this bit to stop accumulating idle_cnt when hardware flow control works."]
20pub type RX_TOUT_FLOW_DIS_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `RX_FLOW_EN` reader - This is the flow enable bit for UART receiver."]
22pub type RX_FLOW_EN_R = crate::BitReader;
23#[doc = "Field `RX_FLOW_EN` writer - This is the flow enable bit for UART receiver."]
24pub type RX_FLOW_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `RX_TOUT_EN` reader - This is the enble bit for uart receiver's timeout function."]
26pub type RX_TOUT_EN_R = crate::BitReader;
27#[doc = "Field `RX_TOUT_EN` writer - This is the enble bit for uart receiver's timeout function."]
28pub type RX_TOUT_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
29impl R {
30 #[doc = "Bits 0:8 - It will produce rxfifo_full_int interrupt when receiver receives more data than this register value."]
31 #[inline(always)]
32 pub fn rxfifo_full_thrhd(&self) -> RXFIFO_FULL_THRHD_R {
33 RXFIFO_FULL_THRHD_R::new((self.bits & 0x01ff) as u16)
34 }
35 #[doc = "Bits 9:17 - It will produce txfifo_empty_int interrupt when the data amount in Tx-FIFO is less than this register value."]
36 #[inline(always)]
37 pub fn txfifo_empty_thrhd(&self) -> TXFIFO_EMPTY_THRHD_R {
38 TXFIFO_EMPTY_THRHD_R::new(((self.bits >> 9) & 0x01ff) as u16)
39 }
40 #[doc = "Bit 18 - Disable UART Rx data overflow detect."]
41 #[inline(always)]
42 pub fn dis_rx_dat_ovf(&self) -> DIS_RX_DAT_OVF_R {
43 DIS_RX_DAT_OVF_R::new(((self.bits >> 18) & 1) != 0)
44 }
45 #[doc = "Bit 19 - Set this bit to stop accumulating idle_cnt when hardware flow control works."]
46 #[inline(always)]
47 pub fn rx_tout_flow_dis(&self) -> RX_TOUT_FLOW_DIS_R {
48 RX_TOUT_FLOW_DIS_R::new(((self.bits >> 19) & 1) != 0)
49 }
50 #[doc = "Bit 20 - This is the flow enable bit for UART receiver."]
51 #[inline(always)]
52 pub fn rx_flow_en(&self) -> RX_FLOW_EN_R {
53 RX_FLOW_EN_R::new(((self.bits >> 20) & 1) != 0)
54 }
55 #[doc = "Bit 21 - This is the enble bit for uart receiver's timeout function."]
56 #[inline(always)]
57 pub fn rx_tout_en(&self) -> RX_TOUT_EN_R {
58 RX_TOUT_EN_R::new(((self.bits >> 21) & 1) != 0)
59 }
60}
61#[cfg(feature = "impl-register-debug")]
62impl core::fmt::Debug for R {
63 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
64 f.debug_struct("CONF1")
65 .field("rxfifo_full_thrhd", &self.rxfifo_full_thrhd())
66 .field("txfifo_empty_thrhd", &self.txfifo_empty_thrhd())
67 .field("dis_rx_dat_ovf", &self.dis_rx_dat_ovf())
68 .field("rx_tout_flow_dis", &self.rx_tout_flow_dis())
69 .field("rx_flow_en", &self.rx_flow_en())
70 .field("rx_tout_en", &self.rx_tout_en())
71 .finish()
72 }
73}
74impl W {
75 #[doc = "Bits 0:8 - It will produce rxfifo_full_int interrupt when receiver receives more data than this register value."]
76 #[inline(always)]
77 pub fn rxfifo_full_thrhd(&mut self) -> RXFIFO_FULL_THRHD_W<CONF1_SPEC> {
78 RXFIFO_FULL_THRHD_W::new(self, 0)
79 }
80 #[doc = "Bits 9:17 - It will produce txfifo_empty_int interrupt when the data amount in Tx-FIFO is less than this register value."]
81 #[inline(always)]
82 pub fn txfifo_empty_thrhd(&mut self) -> TXFIFO_EMPTY_THRHD_W<CONF1_SPEC> {
83 TXFIFO_EMPTY_THRHD_W::new(self, 9)
84 }
85 #[doc = "Bit 18 - Disable UART Rx data overflow detect."]
86 #[inline(always)]
87 pub fn dis_rx_dat_ovf(&mut self) -> DIS_RX_DAT_OVF_W<CONF1_SPEC> {
88 DIS_RX_DAT_OVF_W::new(self, 18)
89 }
90 #[doc = "Bit 19 - Set this bit to stop accumulating idle_cnt when hardware flow control works."]
91 #[inline(always)]
92 pub fn rx_tout_flow_dis(&mut self) -> RX_TOUT_FLOW_DIS_W<CONF1_SPEC> {
93 RX_TOUT_FLOW_DIS_W::new(self, 19)
94 }
95 #[doc = "Bit 20 - This is the flow enable bit for UART receiver."]
96 #[inline(always)]
97 pub fn rx_flow_en(&mut self) -> RX_FLOW_EN_W<CONF1_SPEC> {
98 RX_FLOW_EN_W::new(self, 20)
99 }
100 #[doc = "Bit 21 - This is the enble bit for uart receiver's timeout function."]
101 #[inline(always)]
102 pub fn rx_tout_en(&mut self) -> RX_TOUT_EN_W<CONF1_SPEC> {
103 RX_TOUT_EN_W::new(self, 21)
104 }
105}
106#[doc = "Configuration register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`conf1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
107pub struct CONF1_SPEC;
108impl crate::RegisterSpec for CONF1_SPEC {
109 type Ux = u32;
110}
111#[doc = "`read()` method returns [`conf1::R`](R) reader structure"]
112impl crate::Readable for CONF1_SPEC {}
113#[doc = "`write(|w| ..)` method takes [`conf1::W`](W) writer structure"]
114impl crate::Writable for CONF1_SPEC {
115 type Safety = crate::Unsafe;
116 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
117 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
118}
119#[doc = "`reset()` method sets CONF1 to value 0xc060"]
120impl crate::Resettable for CONF1_SPEC {
121 const RESET_VALUE: u32 = 0xc060;
122}