1#[doc = "Register `INT_ENA` reader"]
2pub type R = crate::R<INT_ENA_SPEC>;
3#[doc = "Register `INT_ENA` writer"]
4pub type W = crate::W<INT_ENA_SPEC>;
5#[doc = "Field `T(0-0)` reader - t%s_int_ena"]
6pub type T_R = crate::BitReader;
7#[doc = "Field `T(0-0)` writer - t%s_int_ena"]
8pub type T_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `WDT` reader - wdt_int_ena"]
10pub type WDT_R = crate::BitReader;
11#[doc = "Field `WDT` writer - wdt_int_ena"]
12pub type WDT_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14 #[doc = "t(0-0)_int_ena"]
15 #[doc = ""]
16 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `T0` field.</div>"]
17 #[inline(always)]
18 pub fn t(&self, n: u8) -> T_R {
19 #[allow(clippy::no_effect)]
20 [(); 1][n as usize];
21 T_R::new(((self.bits >> (n * 0)) & 1) != 0)
22 }
23 #[doc = "Iterator for array of:"]
24 #[doc = "t(0-0)_int_ena"]
25 #[inline(always)]
26 pub fn t_iter(&self) -> impl Iterator<Item = T_R> + '_ {
27 (0..1).map(move |n| T_R::new(((self.bits >> (n * 0)) & 1) != 0))
28 }
29 #[doc = "Bit 0 - t0_int_ena"]
30 #[inline(always)]
31 pub fn t0(&self) -> T_R {
32 T_R::new((self.bits & 1) != 0)
33 }
34 #[doc = "Bit 1 - wdt_int_ena"]
35 #[inline(always)]
36 pub fn wdt(&self) -> WDT_R {
37 WDT_R::new(((self.bits >> 1) & 1) != 0)
38 }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for R {
42 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
43 f.debug_struct("INT_ENA")
44 .field("t0", &self.t0())
45 .field("wdt", &self.wdt())
46 .finish()
47 }
48}
49impl W {
50 #[doc = "t(0-0)_int_ena"]
51 #[doc = ""]
52 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `T0` field.</div>"]
53 #[inline(always)]
54 pub fn t(&mut self, n: u8) -> T_W<INT_ENA_SPEC> {
55 #[allow(clippy::no_effect)]
56 [(); 1][n as usize];
57 T_W::new(self, n * 0)
58 }
59 #[doc = "Bit 0 - t0_int_ena"]
60 #[inline(always)]
61 pub fn t0(&mut self) -> T_W<INT_ENA_SPEC> {
62 T_W::new(self, 0)
63 }
64 #[doc = "Bit 1 - wdt_int_ena"]
65 #[inline(always)]
66 pub fn wdt(&mut self) -> WDT_W<INT_ENA_SPEC> {
67 WDT_W::new(self, 1)
68 }
69}
70#[doc = "INT_ENA_TIMG_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
71pub struct INT_ENA_SPEC;
72impl crate::RegisterSpec for INT_ENA_SPEC {
73 type Ux = u32;
74}
75#[doc = "`read()` method returns [`int_ena::R`](R) reader structure"]
76impl crate::Readable for INT_ENA_SPEC {}
77#[doc = "`write(|w| ..)` method takes [`int_ena::W`](W) writer structure"]
78impl crate::Writable for INT_ENA_SPEC {
79 type Safety = crate::Unsafe;
80 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
81 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
82}
83#[doc = "`reset()` method sets INT_ENA to value 0"]
84impl crate::Resettable for INT_ENA_SPEC {
85 const RESET_VALUE: u32 = 0;
86}