esp32c3/interrupt_core0/
intr_status_reg_0.rs

1#[doc = "Register `INTR_STATUS_REG_0` reader"]
2pub type R = crate::R<INTR_STATUS_REG_0_SPEC>;
3#[doc = "Field `INTR_STATUS_0` reader - reg_core0_intr_status_0"]
4pub type INTR_STATUS_0_R = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:31 - reg_core0_intr_status_0"]
7    #[inline(always)]
8    pub fn intr_status_0(&self) -> INTR_STATUS_0_R {
9        INTR_STATUS_0_R::new(self.bits)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("INTR_STATUS_REG_0")
16            .field("intr_status_0", &self.intr_status_0())
17            .finish()
18    }
19}
20#[doc = "mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`intr_status_reg_0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct INTR_STATUS_REG_0_SPEC;
22impl crate::RegisterSpec for INTR_STATUS_REG_0_SPEC {
23    type Ux = u32;
24}
25#[doc = "`read()` method returns [`intr_status_reg_0::R`](R) reader structure"]
26impl crate::Readable for INTR_STATUS_REG_0_SPEC {}
27#[doc = "`reset()` method sets INTR_STATUS_REG_0 to value 0"]
28impl crate::Resettable for INTR_STATUS_REG_0_SPEC {
29    const RESET_VALUE: u32 = 0;
30}
esp32c3/interrupt_core0/intr_status_reg_0.rs

esp32c3/interrupt_core0/
intr_status_reg_0.rs
