esp32c3/extmem/
ibus_to_flash_end_vaddr.rs

1#[doc = "Register `IBUS_TO_FLASH_END_VADDR` reader"]
2pub type R = crate::R<IBUS_TO_FLASH_END_VADDR_SPEC>;
3#[doc = "Register `IBUS_TO_FLASH_END_VADDR` writer"]
4pub type W = crate::W<IBUS_TO_FLASH_END_VADDR_SPEC>;
5#[doc = "Field `IBUS_TO_FLASH_END_VADDR` reader - The bits are used to configure the end virtual address of ibus to access flash. The register is used to give constraints to ibus access counter."]
6pub type IBUS_TO_FLASH_END_VADDR_R = crate::FieldReader<u32>;
7#[doc = "Field `IBUS_TO_FLASH_END_VADDR` writer - The bits are used to configure the end virtual address of ibus to access flash. The register is used to give constraints to ibus access counter."]
8pub type IBUS_TO_FLASH_END_VADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10    #[doc = "Bits 0:31 - The bits are used to configure the end virtual address of ibus to access flash. The register is used to give constraints to ibus access counter."]
11    #[inline(always)]
12    pub fn ibus_to_flash_end_vaddr(&self) -> IBUS_TO_FLASH_END_VADDR_R {
13        IBUS_TO_FLASH_END_VADDR_R::new(self.bits)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("IBUS_TO_FLASH_END_VADDR")
20            .field("ibus_to_flash_end_vaddr", &self.ibus_to_flash_end_vaddr())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bits 0:31 - The bits are used to configure the end virtual address of ibus to access flash. The register is used to give constraints to ibus access counter."]
26    #[inline(always)]
27    pub fn ibus_to_flash_end_vaddr(
28        &mut self,
29    ) -> IBUS_TO_FLASH_END_VADDR_W<IBUS_TO_FLASH_END_VADDR_SPEC> {
30        IBUS_TO_FLASH_END_VADDR_W::new(self, 0)
31    }
32}
33#[doc = "This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`ibus_to_flash_end_vaddr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ibus_to_flash_end_vaddr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
34pub struct IBUS_TO_FLASH_END_VADDR_SPEC;
35impl crate::RegisterSpec for IBUS_TO_FLASH_END_VADDR_SPEC {
36    type Ux = u32;
37}
38#[doc = "`read()` method returns [`ibus_to_flash_end_vaddr::R`](R) reader structure"]
39impl crate::Readable for IBUS_TO_FLASH_END_VADDR_SPEC {}
40#[doc = "`write(|w| ..)` method takes [`ibus_to_flash_end_vaddr::W`](W) writer structure"]
41impl crate::Writable for IBUS_TO_FLASH_END_VADDR_SPEC {
42    type Safety = crate::Unsafe;
43    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
44    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
45}
46#[doc = "`reset()` method sets IBUS_TO_FLASH_END_VADDR to value 0x427f_ffff"]
47impl crate::Resettable for IBUS_TO_FLASH_END_VADDR_SPEC {
48    const RESET_VALUE: u32 = 0x427f_ffff;
49}
esp32c3/extmem/ibus_to_flash_end_vaddr.rs

esp32c3/extmem/
ibus_to_flash_end_vaddr.rs
