pub type W = W<CONF0_SPEC>;
Expand description
Register CONF0
writer
Aliased Type§
struct W { /* private fields */ }
Implementations§
source§impl W
impl W
sourcepub fn tx_rst(&mut self) -> TX_RST_W<'_, CONF0_SPEC>
pub fn tx_rst(&mut self) -> TX_RST_W<'_, CONF0_SPEC>
Bit 0 - Write 1, then write 0 to this bit to reset decode state machine.
sourcepub fn rx_rst(&mut self) -> RX_RST_W<'_, CONF0_SPEC>
pub fn rx_rst(&mut self) -> RX_RST_W<'_, CONF0_SPEC>
Bit 1 - Write 1, then write 0 to this bit to reset encode state machine.
sourcepub fn uart0_ce(&mut self) -> UART0_CE_W<'_, CONF0_SPEC>
pub fn uart0_ce(&mut self) -> UART0_CE_W<'_, CONF0_SPEC>
Bit 2 - Set this bit to link up HCI and UART0.
sourcepub fn uart1_ce(&mut self) -> UART1_CE_W<'_, CONF0_SPEC>
pub fn uart1_ce(&mut self) -> UART1_CE_W<'_, CONF0_SPEC>
Bit 3 - Set this bit to link up HCI and UART1.
sourcepub fn seper_en(&mut self) -> SEPER_EN_W<'_, CONF0_SPEC>
pub fn seper_en(&mut self) -> SEPER_EN_W<'_, CONF0_SPEC>
Bit 5 - Set this bit to separate the data frame using a special char.
sourcepub fn head_en(&mut self) -> HEAD_EN_W<'_, CONF0_SPEC>
pub fn head_en(&mut self) -> HEAD_EN_W<'_, CONF0_SPEC>
Bit 6 - Set this bit to encode the data packet with a formatting header.
sourcepub fn crc_rec_en(&mut self) -> CRC_REC_EN_W<'_, CONF0_SPEC>
pub fn crc_rec_en(&mut self) -> CRC_REC_EN_W<'_, CONF0_SPEC>
Bit 7 - Set this bit to enable UHCI to receive the 16 bit CRC.
sourcepub fn uart_idle_eof_en(&mut self) -> UART_IDLE_EOF_EN_W<'_, CONF0_SPEC>
pub fn uart_idle_eof_en(&mut self) -> UART_IDLE_EOF_EN_W<'_, CONF0_SPEC>
Bit 8 - If this bit is set to 1, UHCI will end the payload receiving process when UART has been in idle state.
sourcepub fn len_eof_en(&mut self) -> LEN_EOF_EN_W<'_, CONF0_SPEC>
pub fn len_eof_en(&mut self) -> LEN_EOF_EN_W<'_, CONF0_SPEC>
Bit 9 - If this bit is set to 1, UHCI decoder receiving payload data is end when the receiving byte count has reached the specified value. The value is payload length indicated by UHCI packet header when UHCI_HEAD_EN is 1 or the value is configuration value when UHCI_HEAD_EN is 0. If this bit is set to 0, UHCI decoder receiving payload data is end when 0xc0 is received.
sourcepub fn encode_crc_en(&mut self) -> ENCODE_CRC_EN_W<'_, CONF0_SPEC>
pub fn encode_crc_en(&mut self) -> ENCODE_CRC_EN_W<'_, CONF0_SPEC>
Bit 10 - Set this bit to enable data integrity checking by appending a 16 bit CCITT-CRC to end of the payload.
sourcepub fn clk_en(&mut self) -> CLK_EN_W<'_, CONF0_SPEC>
pub fn clk_en(&mut self) -> CLK_EN_W<'_, CONF0_SPEC>
Bit 11 - 1’b1: Force clock on for register. 1’b0: Support clock only when application writes registers.
sourcepub fn uart_rx_brk_eof_en(&mut self) -> UART_RX_BRK_EOF_EN_W<'_, CONF0_SPEC>
pub fn uart_rx_brk_eof_en(&mut self) -> UART_RX_BRK_EOF_EN_W<'_, CONF0_SPEC>
Bit 12 - If this bit is set to 1, UHCI will end payload receive process when NULL frame is received by UART.