pub type W = W<CONF1_SPEC>;
Expand description
Register CONF1
writer
Aliased Type§
struct W { /* private fields */ }
Implementations§
source§impl W
impl W
sourcepub fn rxfifo_full_thrhd(&mut self) -> RXFIFO_FULL_THRHD_W<'_, CONF1_SPEC>
pub fn rxfifo_full_thrhd(&mut self) -> RXFIFO_FULL_THRHD_W<'_, CONF1_SPEC>
Bits 0:8 - It will produce rxfifo_full_int interrupt when receiver receives more data than this register value.
sourcepub fn txfifo_empty_thrhd(&mut self) -> TXFIFO_EMPTY_THRHD_W<'_, CONF1_SPEC>
pub fn txfifo_empty_thrhd(&mut self) -> TXFIFO_EMPTY_THRHD_W<'_, CONF1_SPEC>
Bits 9:17 - It will produce txfifo_empty_int interrupt when the data amount in Tx-FIFO is less than this register value.
sourcepub fn dis_rx_dat_ovf(&mut self) -> DIS_RX_DAT_OVF_W<'_, CONF1_SPEC>
pub fn dis_rx_dat_ovf(&mut self) -> DIS_RX_DAT_OVF_W<'_, CONF1_SPEC>
Bit 18 - Disable UART Rx data overflow detect.
sourcepub fn rx_tout_flow_dis(&mut self) -> RX_TOUT_FLOW_DIS_W<'_, CONF1_SPEC>
pub fn rx_tout_flow_dis(&mut self) -> RX_TOUT_FLOW_DIS_W<'_, CONF1_SPEC>
Bit 19 - Set this bit to stop accumulating idle_cnt when hardware flow control works.
sourcepub fn rx_flow_en(&mut self) -> RX_FLOW_EN_W<'_, CONF1_SPEC>
pub fn rx_flow_en(&mut self) -> RX_FLOW_EN_W<'_, CONF1_SPEC>
Bit 20 - This is the flow enable bit for UART receiver.
sourcepub fn rx_tout_en(&mut self) -> RX_TOUT_EN_W<'_, CONF1_SPEC>
pub fn rx_tout_en(&mut self) -> RX_TOUT_EN_W<'_, CONF1_SPEC>
Bit 21 - This is the enble bit for uart receiver’s timeout function.