Type Alias esp32c3::system::perip_clk_en1::W
source · pub type W = W<PERIP_CLK_EN1_SPEC>;
Expand description
Register PERIP_CLK_EN1
writer
Aliased Type§
struct W { /* private fields */ }
Implementations§
source§impl W
impl W
sourcepub fn crypto_aes_clk_en(
&mut self
) -> CRYPTO_AES_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
pub fn crypto_aes_clk_en( &mut self ) -> CRYPTO_AES_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
Bit 1 - reg_crypto_aes_clk_en
sourcepub fn crypto_sha_clk_en(
&mut self
) -> CRYPTO_SHA_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
pub fn crypto_sha_clk_en( &mut self ) -> CRYPTO_SHA_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
Bit 2 - reg_crypto_sha_clk_en
sourcepub fn crypto_rsa_clk_en(
&mut self
) -> CRYPTO_RSA_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
pub fn crypto_rsa_clk_en( &mut self ) -> CRYPTO_RSA_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
Bit 3 - reg_crypto_rsa_clk_en
sourcepub fn crypto_ds_clk_en(&mut self) -> CRYPTO_DS_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
pub fn crypto_ds_clk_en(&mut self) -> CRYPTO_DS_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
Bit 4 - reg_crypto_ds_clk_en
sourcepub fn crypto_hmac_clk_en(
&mut self
) -> CRYPTO_HMAC_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
pub fn crypto_hmac_clk_en( &mut self ) -> CRYPTO_HMAC_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
Bit 5 - reg_crypto_hmac_clk_en
sourcepub fn dma_clk_en(&mut self) -> DMA_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
pub fn dma_clk_en(&mut self) -> DMA_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
Bit 6 - reg_dma_clk_en
sourcepub fn sdio_host_clk_en(&mut self) -> SDIO_HOST_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
pub fn sdio_host_clk_en(&mut self) -> SDIO_HOST_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
Bit 7 - reg_sdio_host_clk_en
sourcepub fn lcd_cam_clk_en(&mut self) -> LCD_CAM_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
pub fn lcd_cam_clk_en(&mut self) -> LCD_CAM_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
Bit 8 - reg_lcd_cam_clk_en
sourcepub fn uart2_clk_en(&mut self) -> UART2_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
pub fn uart2_clk_en(&mut self) -> UART2_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
Bit 9 - reg_uart2_clk_en
sourcepub fn tsens_clk_en(&mut self) -> TSENS_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
pub fn tsens_clk_en(&mut self) -> TSENS_CLK_EN_W<'_, PERIP_CLK_EN1_SPEC>
Bit 10 - reg_tsens_clk_en