Module esp32c3::extmem::core0_acs_cache_int_st

This description will be updated in the near future.

Structs

• CORE0_ACS_CACHE_INT_ST_SPEC
  This description will be updated in the near future.

Type Aliases

• CORE0_DBUS_ACS_MSK_ICACHE_R
  Field CORE0_DBUS_ACS_MSK_ICACHE reader - The bit is used to indicate interrupt by cpu access icache while the core0_dbus is disabled or icache is disabled which include speculative access.
• CORE0_DBUS_REJECT_R
  Field CORE0_DBUS_REJECT reader - The bit is used to indicate interrupt by authentication fail.
• CORE0_DBUS_WR_ICACHE_R
  Field CORE0_DBUS_WR_ICACHE reader - The bit is used to indicate interrupt by dbus trying to write icache
• CORE0_IBUS_ACS_MSK_ICACHE_R
  Field CORE0_IBUS_ACS_MSK_ICACHE reader - The bit is used to indicate interrupt by cpu access icache while the core0_ibus is disabled or icache is disabled which include speculative access.
• CORE0_IBUS_REJECT_R
  Field CORE0_IBUS_REJECT reader - The bit is used to indicate interrupt by authentication fail.
• CORE0_IBUS_WR_ICACHE_R
  Field CORE0_IBUS_WR_ICACHE reader - The bit is used to indicate interrupt by ibus trying to write icache
• R
  Register CORE0_ACS_CACHE_INT_ST reader