Type Alias esp32c3::extmem::cache_ilg_int_ena::W
source · pub type W = W<CACHE_ILG_INT_ENA_SPEC>;
Expand description
Register CACHE_ILG_INT_ENA
writer
Aliased Type§
struct W { /* private fields */ }
Implementations§
source§impl W
impl W
sourcepub fn icache_sync_op_fault(
&mut self
) -> ICACHE_SYNC_OP_FAULT_W<'_, CACHE_ILG_INT_ENA_SPEC>
pub fn icache_sync_op_fault( &mut self ) -> ICACHE_SYNC_OP_FAULT_W<'_, CACHE_ILG_INT_ENA_SPEC>
Bit 0 - The bit is used to enable interrupt by sync configurations fault.
sourcepub fn icache_preload_op_fault(
&mut self
) -> ICACHE_PRELOAD_OP_FAULT_W<'_, CACHE_ILG_INT_ENA_SPEC>
pub fn icache_preload_op_fault( &mut self ) -> ICACHE_PRELOAD_OP_FAULT_W<'_, CACHE_ILG_INT_ENA_SPEC>
Bit 1 - The bit is used to enable interrupt by preload configurations fault.
sourcepub fn mmu_entry_fault(
&mut self
) -> MMU_ENTRY_FAULT_W<'_, CACHE_ILG_INT_ENA_SPEC>
pub fn mmu_entry_fault( &mut self ) -> MMU_ENTRY_FAULT_W<'_, CACHE_ILG_INT_ENA_SPEC>
Bit 5 - The bit is used to enable interrupt by mmu entry fault.
sourcepub fn ibus_cnt_ovf(&mut self) -> IBUS_CNT_OVF_W<'_, CACHE_ILG_INT_ENA_SPEC>
pub fn ibus_cnt_ovf(&mut self) -> IBUS_CNT_OVF_W<'_, CACHE_ILG_INT_ENA_SPEC>
Bit 7 - The bit is used to enable interrupt by ibus counter overflow.
sourcepub fn dbus_cnt_ovf(&mut self) -> DBUS_CNT_OVF_W<'_, CACHE_ILG_INT_ENA_SPEC>
pub fn dbus_cnt_ovf(&mut self) -> DBUS_CNT_OVF_W<'_, CACHE_ILG_INT_ENA_SPEC>
Bit 8 - The bit is used to enable interrupt by dbus counter overflow.