Module esp32c3::apb_saradc::ctrl
source · Expand description
digital saradc configure register
Structs§
- digital saradc configure register
Type Aliases§
- Register
CTRL
reader - Field
SAR_CLK_DIV
reader - SAR clock divider - Field
SAR_CLK_DIV
writer - SAR clock divider - Field
SAR_CLK_GATED
reader - SAR clock gated - Field
SAR_CLK_GATED
writer - SAR clock gated - Field
SAR_PATT_LEN
reader - 0 ~ 15 means length 1 ~ 16 - Field
SAR_PATT_LEN
writer - 0 ~ 15 means length 1 ~ 16 - Field
SAR_PATT_P_CLEAR
reader - clear the pointer of pattern table for DIG ADC1 CTRL - Field
SAR_PATT_P_CLEAR
writer - clear the pointer of pattern table for DIG ADC1 CTRL - Field
START_FORCE
reader - select software enable saradc sample - Field
START_FORCE
writer - select software enable saradc sample - Field
START
reader - software enable saradc sample - Field
START
writer - software enable saradc sample - Register
CTRL
writer - Field
WAIT_ARB_CYCLE
reader - wait arbit signal stable after sar_done - Field
WAIT_ARB_CYCLE
writer - wait arbit signal stable after sar_done - Field
XPD_SAR_FORCE
reader - force option to xpd sar blocks - Field
XPD_SAR_FORCE
writer - force option to xpd sar blocks