Struct esp32c3::SPI1

pub struct SPI1 { /* private fields */ }

SPI (Serial Peripheral Interface) Controller 1

Implementations

impl SPI1

pub const PTR: *const RegisterBlock = {0x60002000 as *const spi1::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn cmd(&self) -> &CMD

0x00 - SPI1 memory command register

pub fn addr(&self) -> &ADDR

0x04 - SPI1 address register

pub fn ctrl(&self) -> &CTRL

0x08 - SPI1 control register.

pub fn ctrl1(&self) -> &CTRL1

0x0c - SPI1 control1 register.

pub fn ctrl2(&self) -> &CTRL2

0x10 - SPI1 control2 register.

pub fn clock(&self) -> &CLOCK

0x14 - SPI1 clock division control register.

pub fn user(&self) -> &USER

0x18 - SPI1 user register.

pub fn user1(&self) -> &USER1

0x1c - SPI1 user1 register.

pub fn user2(&self) -> &USER2

0x20 - SPI1 user2 register.

pub fn mosi_dlen(&self) -> &MOSI_DLEN

0x24 - SPI1 send data bit length control register.

pub fn miso_dlen(&self) -> &MISO_DLEN

0x28 - SPI1 receive data bit length control register.

pub fn rd_status(&self) -> &RD_STATUS

0x2c - SPI1 status register.

pub fn misc(&self) -> &MISC

0x34 - SPI1 misc register

pub fn tx_crc(&self) -> &TX_CRC

0x38 - SPI1 TX CRC data register.

pub fn cache_fctrl(&self) -> &CACHE_FCTRL

0x3c - SPI1 bit mode control register.

pub fn w0(&self) -> &W0

0x58 - SPI1 memory data buffer0

pub fn w1(&self) -> &W1

0x5c - SPI1 memory data buffer1

pub fn w2(&self) -> &W2

0x60 - SPI1 memory data buffer2

pub fn w3(&self) -> &W3

0x64 - SPI1 memory data buffer3

pub fn w4(&self) -> &W4

0x68 - SPI1 memory data buffer4

pub fn w5(&self) -> &W5

0x6c - SPI1 memory data buffer5

pub fn w6(&self) -> &W6

0x70 - SPI1 memory data buffer6

pub fn w7(&self) -> &W7

0x74 - SPI1 memory data buffer7

pub fn w8(&self) -> &W8

0x78 - SPI1 memory data buffer8

pub fn w9(&self) -> &W9

0x7c - SPI1 memory data buffer9

pub fn w10(&self) -> &W10

0x80 - SPI1 memory data buffer10

pub fn w11(&self) -> &W11

0x84 - SPI1 memory data buffer11

pub fn w12(&self) -> &W12

0x88 - SPI1 memory data buffer12

pub fn w13(&self) -> &W13

0x8c - SPI1 memory data buffer13

pub fn w14(&self) -> &W14

0x90 - SPI1 memory data buffer14

pub fn w15(&self) -> &W15

0x94 - SPI1 memory data buffer15

pub fn flash_waiti_ctrl(&self) -> &FLASH_WAITI_CTRL

0x98 - SPI1 wait idle control register

pub fn flash_sus_ctrl(&self) -> &FLASH_SUS_CTRL

0x9c - SPI1 flash suspend control register

pub fn flash_sus_cmd(&self) -> &FLASH_SUS_CMD

0xa0 - SPI1 flash suspend command register

pub fn sus_status(&self) -> &SUS_STATUS

0xa4 - SPI1 flash suspend status register

pub fn timing_cali(&self) -> &TIMING_CALI

0xa8 - SPI1 timing control register

pub fn int_ena(&self) -> &INT_ENA

0xc0 - SPI1 interrupt enable register

pub fn int_clr(&self) -> &INT_CLR

0xc4 - SPI1 interrupt clear register

pub fn int_raw(&self) -> &INT_RAW

0xc8 - SPI1 interrupt raw register

pub fn int_st(&self) -> &INT_ST

0xcc - SPI1 interrupt status register

pub fn clock_gate(&self) -> &CLOCK_GATE

0xdc - SPI1 clk_gate register

pub fn date(&self) -> &DATE

0x3fc - Version control register

Trait Implementations

impl Debug for SPI1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for SPI1

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for SPI1