Module esp32c3::spi1::cmd

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SPI1 memory command register

Structs§

Type Aliases§

  • FLASH_BE_R
    Field FLASH_BE reader - Block erase enable(32KB) . Block erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_BE_W
    Field FLASH_BE writer - Block erase enable(32KB) . Block erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_CE_R
    Field FLASH_CE reader - Chip erase enable. Chip erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_CE_W
    Field FLASH_CE writer - Chip erase enable. Chip erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_DP_R
    Field FLASH_DP reader - Drive Flash into power down. An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_DP_W
    Field FLASH_DP writer - Drive Flash into power down. An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_HPM_R
    Field FLASH_HPM reader - Drive Flash into high performance mode. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_HPM_W
    Field FLASH_HPM writer - Drive Flash into high performance mode. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_PE_R
    Field FLASH_PE reader - In user mode, it is set to indicate that program/erase operation will be triggered. The bit is combined with spi_mem_usr bit. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_PE_W
    Field FLASH_PE writer - In user mode, it is set to indicate that program/erase operation will be triggered. The bit is combined with spi_mem_usr bit. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_PP_R
    Field FLASH_PP reader - Page program enable(1 byte ~256 bytes data to be programmed). Page program operation will be triggered when the bit is set. The bit will be cleared once the operation done .1: enable 0: disable.
  • FLASH_PP_W
    Field FLASH_PP writer - Page program enable(1 byte ~256 bytes data to be programmed). Page program operation will be triggered when the bit is set. The bit will be cleared once the operation done .1: enable 0: disable.
  • FLASH_RDID_R
    Field FLASH_RDID reader - Read JEDEC ID . Read ID command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.
  • FLASH_RDID_W
    Field FLASH_RDID writer - Read JEDEC ID . Read ID command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.
  • FLASH_RDSR_R
    Field FLASH_RDSR reader - Read status register-1. Read status operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_RDSR_W
    Field FLASH_RDSR writer - Read status register-1. Read status operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_READ_R
    Field FLASH_READ reader - Read flash enable. Read flash operation will be triggered when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.
  • FLASH_READ_W
    Field FLASH_READ writer - Read flash enable. Read flash operation will be triggered when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.
  • FLASH_RES_R
    Field FLASH_RES reader - This bit combined with reg_resandres bit releases Flash from the power-down state or high performance mode and obtains the devices ID. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_RES_W
    Field FLASH_RES writer - This bit combined with reg_resandres bit releases Flash from the power-down state or high performance mode and obtains the devices ID. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_SE_R
    Field FLASH_SE reader - Sector erase enable(4KB). Sector erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_SE_W
    Field FLASH_SE writer - Sector erase enable(4KB). Sector erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_WRDI_R
    Field FLASH_WRDI reader - Write flash disable. Write disable command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.
  • FLASH_WRDI_W
    Field FLASH_WRDI writer - Write flash disable. Write disable command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.
  • FLASH_WREN_R
    Field FLASH_WREN reader - Write flash enable. Write enable command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.
  • FLASH_WREN_W
    Field FLASH_WREN writer - Write flash enable. Write enable command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.
  • FLASH_WRSR_R
    Field FLASH_WRSR reader - Write status register enable. Write status operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • FLASH_WRSR_W
    Field FLASH_WRSR writer - Write status register enable. Write status operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • MSPI_ST_R
    Field MSPI_ST reader - The current status of SPI1 slave FSM: mspi_st. 0: idle state, 1: preparation state, 2: send command state, 3: send address state, 4: wait state, 5: read data state, 6:write data state, 7: done state, 8: read data end state.
  • R
    Register CMD reader
  • SPI1_MST_ST_R
    Field SPI1_MST_ST reader - The current status of SPI1 master FSM.
  • USR_R
    Field USR reader - User define command enable. An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • USR_W
    Field USR writer - User define command enable. An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.
  • W
    Register CMD writer