Module din_num

SPI0 input delay number control register

Structs

DIN_NUM_SPEC

SPI0 input delay number control register

Type Aliases

DIN0_NUM_R

Field DIN0_NUM reader - the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…

DIN0_NUM_W

Field DIN0_NUM writer - the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…

DIN1_NUM_R

Field DIN1_NUM reader - the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…

DIN1_NUM_W

Field DIN1_NUM writer - the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…

DIN2_NUM_R

Field DIN2_NUM reader - the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…

DIN2_NUM_W

Field DIN2_NUM writer - the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…

DIN3_NUM_R

Field DIN3_NUM reader - the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…

DIN3_NUM_W

Field DIN3_NUM writer - the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…

R

Register DIN_NUM reader

W

Register DIN_NUM writer