Module esp32c3::sha

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Expand description

SHA (Secure Hash Algorithm) Accelerator

Modules§

  • Busy register.
  • Interrupt clear register.
  • Typical SHA configuration register 1.
  • Date register.
  • DMA configuration register 0.
  • DMA configuration register 2.
  • DMA configuration register 1.
  • Sha H memory which contains intermediate hash or finial hash.
  • Interrupt enable register.
  • Sha M memory which contains message.
  • Initial configuration register.
  • Typical SHA configuration register 0.
  • SHA 512/t configuration register 1.
  • SHA 512/t configuration register 0.

Structs§

Type Aliases§

  • BUSY (r) register accessor: Busy register.
  • CLEAR_IRQ (w) register accessor: Interrupt clear register.
  • CONTINUE (w) register accessor: Typical SHA configuration register 1.
  • DATE (rw) register accessor: Date register.
  • DMA_BLOCK_NUM (rw) register accessor: DMA configuration register 0.
  • DMA_CONTINUE (w) register accessor: DMA configuration register 2.
  • DMA_START (w) register accessor: DMA configuration register 1.
  • H_MEM (rw) register accessor: Sha H memory which contains intermediate hash or finial hash.
  • IRQ_ENA (rw) register accessor: Interrupt enable register.
  • MODE (rw) register accessor: Initial configuration register.
  • M_MEM (rw) register accessor: Sha M memory which contains message.
  • START (w) register accessor: Typical SHA configuration register 0.
  • T_LENGTH (rw) register accessor: SHA 512/t configuration register 1.
  • T_STRING (rw) register accessor: SHA 512/t configuration register 0.