esp32c3/sensitive/
core_x_dram0_pms_constrain_1.rs1#[doc = "Register `CORE_X_DRAM0_PMS_CONSTRAIN_1` reader"]
2pub type R = crate::R<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC>;
3#[doc = "Register `CORE_X_DRAM0_PMS_CONSTRAIN_1` writer"]
4pub type W = crate::W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC>;
5#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0` reader - core_x_dram0_pms_constrain_sram_world_0_pms_0"]
6pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_R = crate::FieldReader;
7#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0` writer - core_x_dram0_pms_constrain_sram_world_0_pms_0"]
8pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1` reader - core_x_dram0_pms_constrain_sram_world_0_pms_1"]
10pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_R = crate::FieldReader;
11#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1` writer - core_x_dram0_pms_constrain_sram_world_0_pms_1"]
12pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2` reader - core_x_dram0_pms_constrain_sram_world_0_pms_2"]
14pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_R = crate::FieldReader;
15#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2` writer - core_x_dram0_pms_constrain_sram_world_0_pms_2"]
16pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3` reader - core_x_dram0_pms_constrain_sram_world_0_pms_3"]
18pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_R = crate::FieldReader;
19#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3` writer - core_x_dram0_pms_constrain_sram_world_0_pms_3"]
20pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
21#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0` reader - core_x_dram0_pms_constrain_sram_world_1_pms_0"]
22pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_R = crate::FieldReader;
23#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0` writer - core_x_dram0_pms_constrain_sram_world_1_pms_0"]
24pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
25#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1` reader - core_x_dram0_pms_constrain_sram_world_1_pms_1"]
26pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_R = crate::FieldReader;
27#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1` writer - core_x_dram0_pms_constrain_sram_world_1_pms_1"]
28pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
29#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2` reader - core_x_dram0_pms_constrain_sram_world_1_pms_2"]
30pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_R = crate::FieldReader;
31#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2` writer - core_x_dram0_pms_constrain_sram_world_1_pms_2"]
32pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
33#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3` reader - core_x_dram0_pms_constrain_sram_world_1_pms_3"]
34pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_R = crate::FieldReader;
35#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3` writer - core_x_dram0_pms_constrain_sram_world_1_pms_3"]
36pub type CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
37#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS` reader - core_x_dram0_pms_constrain_rom_world_0_pms"]
38pub type CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_R = crate::FieldReader;
39#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS` writer - core_x_dram0_pms_constrain_rom_world_0_pms"]
40pub type CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
41#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS` reader - core_x_dram0_pms_constrain_rom_world_1_pms"]
42pub type CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_R = crate::FieldReader;
43#[doc = "Field `CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS` writer - core_x_dram0_pms_constrain_rom_world_1_pms"]
44pub type CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
45impl R {
46 #[doc = "Bits 0:1 - core_x_dram0_pms_constrain_sram_world_0_pms_0"]
47 #[inline(always)]
48 pub fn core_x_dram0_pms_constrain_sram_world_0_pms_0(
49 &self,
50 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_R {
51 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_R::new((self.bits & 3) as u8)
52 }
53 #[doc = "Bits 2:3 - core_x_dram0_pms_constrain_sram_world_0_pms_1"]
54 #[inline(always)]
55 pub fn core_x_dram0_pms_constrain_sram_world_0_pms_1(
56 &self,
57 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_R {
58 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_R::new(((self.bits >> 2) & 3) as u8)
59 }
60 #[doc = "Bits 4:5 - core_x_dram0_pms_constrain_sram_world_0_pms_2"]
61 #[inline(always)]
62 pub fn core_x_dram0_pms_constrain_sram_world_0_pms_2(
63 &self,
64 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_R {
65 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_R::new(((self.bits >> 4) & 3) as u8)
66 }
67 #[doc = "Bits 6:7 - core_x_dram0_pms_constrain_sram_world_0_pms_3"]
68 #[inline(always)]
69 pub fn core_x_dram0_pms_constrain_sram_world_0_pms_3(
70 &self,
71 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_R {
72 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_R::new(((self.bits >> 6) & 3) as u8)
73 }
74 #[doc = "Bits 12:13 - core_x_dram0_pms_constrain_sram_world_1_pms_0"]
75 #[inline(always)]
76 pub fn core_x_dram0_pms_constrain_sram_world_1_pms_0(
77 &self,
78 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_R {
79 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_R::new(((self.bits >> 12) & 3) as u8)
80 }
81 #[doc = "Bits 14:15 - core_x_dram0_pms_constrain_sram_world_1_pms_1"]
82 #[inline(always)]
83 pub fn core_x_dram0_pms_constrain_sram_world_1_pms_1(
84 &self,
85 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_R {
86 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_R::new(((self.bits >> 14) & 3) as u8)
87 }
88 #[doc = "Bits 16:17 - core_x_dram0_pms_constrain_sram_world_1_pms_2"]
89 #[inline(always)]
90 pub fn core_x_dram0_pms_constrain_sram_world_1_pms_2(
91 &self,
92 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_R {
93 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_R::new(((self.bits >> 16) & 3) as u8)
94 }
95 #[doc = "Bits 18:19 - core_x_dram0_pms_constrain_sram_world_1_pms_3"]
96 #[inline(always)]
97 pub fn core_x_dram0_pms_constrain_sram_world_1_pms_3(
98 &self,
99 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_R {
100 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_R::new(((self.bits >> 18) & 3) as u8)
101 }
102 #[doc = "Bits 24:25 - core_x_dram0_pms_constrain_rom_world_0_pms"]
103 #[inline(always)]
104 pub fn core_x_dram0_pms_constrain_rom_world_0_pms(
105 &self,
106 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_R {
107 CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_R::new(((self.bits >> 24) & 3) as u8)
108 }
109 #[doc = "Bits 26:27 - core_x_dram0_pms_constrain_rom_world_1_pms"]
110 #[inline(always)]
111 pub fn core_x_dram0_pms_constrain_rom_world_1_pms(
112 &self,
113 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_R {
114 CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_R::new(((self.bits >> 26) & 3) as u8)
115 }
116}
117#[cfg(feature = "impl-register-debug")]
118impl core::fmt::Debug for R {
119 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
120 f.debug_struct("CORE_X_DRAM0_PMS_CONSTRAIN_1")
121 .field(
122 "core_x_dram0_pms_constrain_sram_world_0_pms_0",
123 &self.core_x_dram0_pms_constrain_sram_world_0_pms_0(),
124 )
125 .field(
126 "core_x_dram0_pms_constrain_sram_world_0_pms_1",
127 &self.core_x_dram0_pms_constrain_sram_world_0_pms_1(),
128 )
129 .field(
130 "core_x_dram0_pms_constrain_sram_world_0_pms_2",
131 &self.core_x_dram0_pms_constrain_sram_world_0_pms_2(),
132 )
133 .field(
134 "core_x_dram0_pms_constrain_sram_world_0_pms_3",
135 &self.core_x_dram0_pms_constrain_sram_world_0_pms_3(),
136 )
137 .field(
138 "core_x_dram0_pms_constrain_sram_world_1_pms_0",
139 &self.core_x_dram0_pms_constrain_sram_world_1_pms_0(),
140 )
141 .field(
142 "core_x_dram0_pms_constrain_sram_world_1_pms_1",
143 &self.core_x_dram0_pms_constrain_sram_world_1_pms_1(),
144 )
145 .field(
146 "core_x_dram0_pms_constrain_sram_world_1_pms_2",
147 &self.core_x_dram0_pms_constrain_sram_world_1_pms_2(),
148 )
149 .field(
150 "core_x_dram0_pms_constrain_sram_world_1_pms_3",
151 &self.core_x_dram0_pms_constrain_sram_world_1_pms_3(),
152 )
153 .field(
154 "core_x_dram0_pms_constrain_rom_world_0_pms",
155 &self.core_x_dram0_pms_constrain_rom_world_0_pms(),
156 )
157 .field(
158 "core_x_dram0_pms_constrain_rom_world_1_pms",
159 &self.core_x_dram0_pms_constrain_rom_world_1_pms(),
160 )
161 .finish()
162 }
163}
164impl W {
165 #[doc = "Bits 0:1 - core_x_dram0_pms_constrain_sram_world_0_pms_0"]
166 #[inline(always)]
167 pub fn core_x_dram0_pms_constrain_sram_world_0_pms_0(
168 &mut self,
169 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC> {
170 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_0_W::new(self, 0)
171 }
172 #[doc = "Bits 2:3 - core_x_dram0_pms_constrain_sram_world_0_pms_1"]
173 #[inline(always)]
174 pub fn core_x_dram0_pms_constrain_sram_world_0_pms_1(
175 &mut self,
176 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC> {
177 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_1_W::new(self, 2)
178 }
179 #[doc = "Bits 4:5 - core_x_dram0_pms_constrain_sram_world_0_pms_2"]
180 #[inline(always)]
181 pub fn core_x_dram0_pms_constrain_sram_world_0_pms_2(
182 &mut self,
183 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC> {
184 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_2_W::new(self, 4)
185 }
186 #[doc = "Bits 6:7 - core_x_dram0_pms_constrain_sram_world_0_pms_3"]
187 #[inline(always)]
188 pub fn core_x_dram0_pms_constrain_sram_world_0_pms_3(
189 &mut self,
190 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC> {
191 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_0_PMS_3_W::new(self, 6)
192 }
193 #[doc = "Bits 12:13 - core_x_dram0_pms_constrain_sram_world_1_pms_0"]
194 #[inline(always)]
195 pub fn core_x_dram0_pms_constrain_sram_world_1_pms_0(
196 &mut self,
197 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC> {
198 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_0_W::new(self, 12)
199 }
200 #[doc = "Bits 14:15 - core_x_dram0_pms_constrain_sram_world_1_pms_1"]
201 #[inline(always)]
202 pub fn core_x_dram0_pms_constrain_sram_world_1_pms_1(
203 &mut self,
204 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC> {
205 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_1_W::new(self, 14)
206 }
207 #[doc = "Bits 16:17 - core_x_dram0_pms_constrain_sram_world_1_pms_2"]
208 #[inline(always)]
209 pub fn core_x_dram0_pms_constrain_sram_world_1_pms_2(
210 &mut self,
211 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC> {
212 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_2_W::new(self, 16)
213 }
214 #[doc = "Bits 18:19 - core_x_dram0_pms_constrain_sram_world_1_pms_3"]
215 #[inline(always)]
216 pub fn core_x_dram0_pms_constrain_sram_world_1_pms_3(
217 &mut self,
218 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC> {
219 CORE_X_DRAM0_PMS_CONSTRAIN_SRAM_WORLD_1_PMS_3_W::new(self, 18)
220 }
221 #[doc = "Bits 24:25 - core_x_dram0_pms_constrain_rom_world_0_pms"]
222 #[inline(always)]
223 pub fn core_x_dram0_pms_constrain_rom_world_0_pms(
224 &mut self,
225 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC> {
226 CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_0_PMS_W::new(self, 24)
227 }
228 #[doc = "Bits 26:27 - core_x_dram0_pms_constrain_rom_world_1_pms"]
229 #[inline(always)]
230 pub fn core_x_dram0_pms_constrain_rom_world_1_pms(
231 &mut self,
232 ) -> CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_W<CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC> {
233 CORE_X_DRAM0_PMS_CONSTRAIN_ROM_WORLD_1_PMS_W::new(self, 26)
234 }
235}
236#[doc = "SENSITIVE_CORE_X_DRAM0_PMS_CONSTRAIN_1_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_x_dram0_pms_constrain_1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_x_dram0_pms_constrain_1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
237pub struct CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC;
238impl crate::RegisterSpec for CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC {
239 type Ux = u32;
240}
241#[doc = "`read()` method returns [`core_x_dram0_pms_constrain_1::R`](R) reader structure"]
242impl crate::Readable for CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC {}
243#[doc = "`write(|w| ..)` method takes [`core_x_dram0_pms_constrain_1::W`](W) writer structure"]
244impl crate::Writable for CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC {
245 type Safety = crate::Unsafe;
246}
247#[doc = "`reset()` method sets CORE_X_DRAM0_PMS_CONSTRAIN_1 to value 0x0f0f_f0ff"]
248impl crate::Resettable for CORE_X_DRAM0_PMS_CONSTRAIN_1_SPEC {
249 const RESET_VALUE: u32 = 0x0f0f_f0ff;
250}