esp32c3/rtc_cntl/
int_ena_rtc_w1tc.rs

1#[doc = "Register `INT_ENA_RTC_W1TC` writer"]
2pub type W = crate::W<INT_ENA_RTC_W1TC_SPEC>;
3#[doc = "Field `SLP_WAKEUP` writer - clear sleep wakeup interrupt enable"]
4pub type SLP_WAKEUP_W<'a, REG> = crate::BitWriter1C<'a, REG>;
5#[doc = "Field `SLP_REJECT` writer - clear sleep reject interrupt enable"]
6pub type SLP_REJECT_W<'a, REG> = crate::BitWriter1C<'a, REG>;
7#[doc = "Field `WDT` writer - clear RTC WDT interrupt enable"]
8pub type WDT_W<'a, REG> = crate::BitWriter1C<'a, REG>;
9#[doc = "Field `BROWN_OUT` writer - clear brown out interrupt enable"]
10pub type BROWN_OUT_W<'a, REG> = crate::BitWriter1C<'a, REG>;
11#[doc = "Field `MAIN_TIMER` writer - Clear RTC main timer interrupt enable"]
12pub type MAIN_TIMER_W<'a, REG> = crate::BitWriter1C<'a, REG>;
13#[doc = "Field `SWD` writer - clear super watch dog interrupt enable"]
14pub type SWD_W<'a, REG> = crate::BitWriter1C<'a, REG>;
15#[doc = "Field `XTAL32K_DEAD` writer - clear xtal32k_dead interrupt enable"]
16pub type XTAL32K_DEAD_W<'a, REG> = crate::BitWriter1C<'a, REG>;
17#[doc = "Field `GLITCH_DET` writer - clear gitch det interrupt enable"]
18pub type GLITCH_DET_W<'a, REG> = crate::BitWriter1C<'a, REG>;
19#[doc = "Field `BBPLL_CAL` writer - clear bbpll cal interrupt enable"]
20pub type BBPLL_CAL_W<'a, REG> = crate::BitWriter1C<'a, REG>;
21#[cfg(feature = "impl-register-debug")]
22impl core::fmt::Debug for crate::generic::Reg<INT_ENA_RTC_W1TC_SPEC> {
23    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
24        write!(f, "(not readable)")
25    }
26}
27impl W {
28    #[doc = "Bit 0 - clear sleep wakeup interrupt enable"]
29    #[inline(always)]
30    pub fn slp_wakeup(&mut self) -> SLP_WAKEUP_W<INT_ENA_RTC_W1TC_SPEC> {
31        SLP_WAKEUP_W::new(self, 0)
32    }
33    #[doc = "Bit 1 - clear sleep reject interrupt enable"]
34    #[inline(always)]
35    pub fn slp_reject(&mut self) -> SLP_REJECT_W<INT_ENA_RTC_W1TC_SPEC> {
36        SLP_REJECT_W::new(self, 1)
37    }
38    #[doc = "Bit 3 - clear RTC WDT interrupt enable"]
39    #[inline(always)]
40    pub fn wdt(&mut self) -> WDT_W<INT_ENA_RTC_W1TC_SPEC> {
41        WDT_W::new(self, 3)
42    }
43    #[doc = "Bit 9 - clear brown out interrupt enable"]
44    #[inline(always)]
45    pub fn brown_out(&mut self) -> BROWN_OUT_W<INT_ENA_RTC_W1TC_SPEC> {
46        BROWN_OUT_W::new(self, 9)
47    }
48    #[doc = "Bit 10 - Clear RTC main timer interrupt enable"]
49    #[inline(always)]
50    pub fn main_timer(&mut self) -> MAIN_TIMER_W<INT_ENA_RTC_W1TC_SPEC> {
51        MAIN_TIMER_W::new(self, 10)
52    }
53    #[doc = "Bit 15 - clear super watch dog interrupt enable"]
54    #[inline(always)]
55    pub fn swd(&mut self) -> SWD_W<INT_ENA_RTC_W1TC_SPEC> {
56        SWD_W::new(self, 15)
57    }
58    #[doc = "Bit 16 - clear xtal32k_dead interrupt enable"]
59    #[inline(always)]
60    pub fn xtal32k_dead(&mut self) -> XTAL32K_DEAD_W<INT_ENA_RTC_W1TC_SPEC> {
61        XTAL32K_DEAD_W::new(self, 16)
62    }
63    #[doc = "Bit 19 - clear gitch det interrupt enable"]
64    #[inline(always)]
65    pub fn glitch_det(&mut self) -> GLITCH_DET_W<INT_ENA_RTC_W1TC_SPEC> {
66        GLITCH_DET_W::new(self, 19)
67    }
68    #[doc = "Bit 20 - clear bbpll cal interrupt enable"]
69    #[inline(always)]
70    pub fn bbpll_cal(&mut self) -> BBPLL_CAL_W<INT_ENA_RTC_W1TC_SPEC> {
71        BBPLL_CAL_W::new(self, 20)
72    }
73}
74#[doc = "rtc configure register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena_rtc_w1tc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
75pub struct INT_ENA_RTC_W1TC_SPEC;
76impl crate::RegisterSpec for INT_ENA_RTC_W1TC_SPEC {
77    type Ux = u32;
78}
79#[doc = "`write(|w| ..)` method takes [`int_ena_rtc_w1tc::W`](W) writer structure"]
80impl crate::Writable for INT_ENA_RTC_W1TC_SPEC {
81    type Safety = crate::Unsafe;
82    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
83    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x0019_860b;
84}
85#[doc = "`reset()` method sets INT_ENA_RTC_W1TC to value 0"]
86impl crate::Resettable for INT_ENA_RTC_W1TC_SPEC {
87    const RESET_VALUE: u32 = 0;
88}
esp32c3/rtc_cntl/int_ena_rtc_w1tc.rs

esp32c3/rtc_cntl/
int_ena_rtc_w1tc.rs
