Module din_num

Source
Expand description

SPI input delay number configuration

Structs§

DIN_NUM_SPEC
SPI input delay number configuration

Type Aliases§

DIN0_NUM_R
Field DIN0_NUM reader - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.
DIN0_NUM_W
Field DIN0_NUM writer - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.
DIN1_NUM_R
Field DIN1_NUM reader - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.
DIN1_NUM_W
Field DIN1_NUM writer - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.
DIN2_NUM_R
Field DIN2_NUM reader - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.
DIN2_NUM_W
Field DIN2_NUM writer - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.
DIN3_NUM_R
Field DIN3_NUM reader - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.
DIN3_NUM_W
Field DIN3_NUM writer - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.
R
Register DIN_NUM reader
W
Register DIN_NUM writer