Expand description
SPI (Serial Peripheral Interface) Controller 0
Modules§
- cache_
fctrl - SPI0 bit mode control register.
- clock
- SPI clock division control register.
- clock_
gate - SPI0 clk_gate register
- core_
clk_ sel - SPI0 module clock select register
- ctrl
- SPI0 control register.
- ctrl1
- SPI0 control1 register.
- ctrl2
- SPI0 control2 register.
- date
- Version control register
- din_
mode - SPI0 input delay mode control register
- din_num
- SPI0 input delay number control register
- dout_
mode - SPI0 output delay mode control register
- fsm
- SPI0 FSM status register
- misc
- SPI0 misc register
- rd_
status - SPI0 read control register.
- timing_
cali - SPI0 timing calibration register
- user
- SPI0 user register.
- user1
- SPI0 user1 register.
- user2
- SPI0 user2 register.
Structs§
- Register
Block - Register block
Type Aliases§
- CACHE_
FCTRL - CACHE_FCTRL (rw) register accessor: SPI0 bit mode control register.
- CLOCK
- CLOCK (rw) register accessor: SPI clock division control register.
- CLOCK_
GATE - CLOCK_GATE (rw) register accessor: SPI0 clk_gate register
- CORE_
CLK_ SEL - CORE_CLK_SEL (rw) register accessor: SPI0 module clock select register
- CTRL
- CTRL (rw) register accessor: SPI0 control register.
- CTRL1
- CTRL1 (rw) register accessor: SPI0 control1 register.
- CTRL2
- CTRL2 (rw) register accessor: SPI0 control2 register.
- DATE
- DATE (rw) register accessor: Version control register
- DIN_
MODE - DIN_MODE (rw) register accessor: SPI0 input delay mode control register
- DIN_NUM
- DIN_NUM (rw) register accessor: SPI0 input delay number control register
- DOUT_
MODE - DOUT_MODE (rw) register accessor: SPI0 output delay mode control register
- FSM
- FSM (rw) register accessor: SPI0 FSM status register
- MISC
- MISC (rw) register accessor: SPI0 misc register
- RD_
STATUS - RD_STATUS (rw) register accessor: SPI0 read control register.
- TIMING_
CALI - TIMING_CALI (rw) register accessor: SPI0 timing calibration register
- USER
- USER (rw) register accessor: SPI0 user register.
- USER1
- USER1 (rw) register accessor: SPI0 user1 register.
- USER2
- USER2 (rw) register accessor: SPI0 user2 register.