Expand description
SPI (Serial Peripheral Interface) Controller 2
Modules§
- Address value register
- SPI module clock and register clock control
- SPI clock control register
- Command control register
- SPI control register
- Version control
- SPI input delay mode configuration
- SPI input delay number configuration
- SPI DMA control register
- SPI DMA interrupt clear register
- SPI DMA interrupt enable register
- SPI DMA interrupt raw register
- SPI DMA interrupt status register
- SPI output delay mode configuration
- SPI misc register
- SPI data bit length control register
- SPI slave control register
- SPI slave control register 1
- SPI USER control register
- SPI USER control register 1
- SPI USER control register 2
- SPI CPU-controlled buffer0
- SPI CPU-controlled buffer1
- SPI CPU-controlled buffer2
- SPI CPU-controlled buffer3
- SPI CPU-controlled buffer4
- SPI CPU-controlled buffer5
- SPI CPU-controlled buffer6
- SPI CPU-controlled buffer7
- SPI CPU-controlled buffer8
- SPI CPU-controlled buffer9
- SPI CPU-controlled buffer10
- SPI CPU-controlled buffer11
- SPI CPU-controlled buffer12
- SPI CPU-controlled buffer13
- SPI CPU-controlled buffer14
- SPI CPU-controlled buffer15
Structs§
- Register block
Type Aliases§
- ADDR (rw) register accessor: Address value register
- CLK_GATE (rw) register accessor: SPI module clock and register clock control
- CLOCK (rw) register accessor: SPI clock control register
- CMD (rw) register accessor: Command control register
- CTRL (rw) register accessor: SPI control register
- DATE (rw) register accessor: Version control
- DIN_MODE (rw) register accessor: SPI input delay mode configuration
- DIN_NUM (rw) register accessor: SPI input delay number configuration
- DMA_CONF (rw) register accessor: SPI DMA control register
- DMA_INT_CLR (w) register accessor: SPI DMA interrupt clear register
- DMA_INT_ENA (rw) register accessor: SPI DMA interrupt enable register
- DMA_INT_RAW (rw) register accessor: SPI DMA interrupt raw register
- DMA_INT_ST (r) register accessor: SPI DMA interrupt status register
- DOUT_MODE (rw) register accessor: SPI output delay mode configuration
- MISC (rw) register accessor: SPI misc register
- MS_DLEN (rw) register accessor: SPI data bit length control register
- SLAVE (rw) register accessor: SPI slave control register
- SLAVE1 (rw) register accessor: SPI slave control register 1
- USER (rw) register accessor: SPI USER control register
- USER1 (rw) register accessor: SPI USER control register 1
- USER2 (rw) register accessor: SPI USER control register 2
- W0 (rw) register accessor: SPI CPU-controlled buffer0
- W1 (rw) register accessor: SPI CPU-controlled buffer1
- W2 (rw) register accessor: SPI CPU-controlled buffer2
- W3 (rw) register accessor: SPI CPU-controlled buffer3
- W4 (rw) register accessor: SPI CPU-controlled buffer4
- W5 (rw) register accessor: SPI CPU-controlled buffer5
- W6 (rw) register accessor: SPI CPU-controlled buffer6
- W7 (rw) register accessor: SPI CPU-controlled buffer7
- W8 (rw) register accessor: SPI CPU-controlled buffer8
- W9 (rw) register accessor: SPI CPU-controlled buffer9
- W10 (rw) register accessor: SPI CPU-controlled buffer10
- W11 (rw) register accessor: SPI CPU-controlled buffer11
- W12 (rw) register accessor: SPI CPU-controlled buffer12
- W13 (rw) register accessor: SPI CPU-controlled buffer13
- W14 (rw) register accessor: SPI CPU-controlled buffer14
- W15 (rw) register accessor: SPI CPU-controlled buffer15