Module esp32c3::spi1::clock

SPI1 clock division control register.

Structs

• CLOCK_SPEC
  SPI1 clock division control register.

Type Aliases

• CLKCNT_H_R
  Field CLKCNT_H reader - In the master mode it must be floor((spi_mem_clkcnt_N+1)/2-1).
• CLKCNT_H_W
  Field CLKCNT_H writer - In the master mode it must be floor((spi_mem_clkcnt_N+1)/2-1).
• CLKCNT_L_R
  Field CLKCNT_L reader - In the master mode it must be equal to spi_mem_clkcnt_N.
• CLKCNT_L_W
  Field CLKCNT_L writer - In the master mode it must be equal to spi_mem_clkcnt_N.
• CLKCNT_N_R
  Field CLKCNT_N reader - In the master mode it is the divider of spi_mem_clk. So spi_mem_clk frequency is system/(spi_mem_clkcnt_N+1)
• CLKCNT_N_W
  Field CLKCNT_N writer - In the master mode it is the divider of spi_mem_clk. So spi_mem_clk frequency is system/(spi_mem_clkcnt_N+1)
• CLK_EQU_SYSCLK_R
  Field CLK_EQU_SYSCLK reader - reserved
• CLK_EQU_SYSCLK_W
  Field CLK_EQU_SYSCLK writer - reserved
• R
  Register CLOCK reader
• W
  Register CLOCK writer