pub type W = W<INT_ENA_SPEC>;
Expand description
Register INT_ENA
writer
Aliased Type§
struct W { /* private fields */ }
Implementations§
source§impl W
impl W
sourcepub fn rxfifo_full(&mut self) -> RXFIFO_FULL_W<'_, INT_ENA_SPEC>
pub fn rxfifo_full(&mut self) -> RXFIFO_FULL_W<'_, INT_ENA_SPEC>
Bit 0 - This is the enable bit for rxfifo_full_int_st register.
sourcepub fn txfifo_empty(&mut self) -> TXFIFO_EMPTY_W<'_, INT_ENA_SPEC>
pub fn txfifo_empty(&mut self) -> TXFIFO_EMPTY_W<'_, INT_ENA_SPEC>
Bit 1 - This is the enable bit for txfifo_empty_int_st register.
sourcepub fn parity_err(&mut self) -> PARITY_ERR_W<'_, INT_ENA_SPEC>
pub fn parity_err(&mut self) -> PARITY_ERR_W<'_, INT_ENA_SPEC>
Bit 2 - This is the enable bit for parity_err_int_st register.
sourcepub fn frm_err(&mut self) -> FRM_ERR_W<'_, INT_ENA_SPEC>
pub fn frm_err(&mut self) -> FRM_ERR_W<'_, INT_ENA_SPEC>
Bit 3 - This is the enable bit for frm_err_int_st register.
sourcepub fn rxfifo_ovf(&mut self) -> RXFIFO_OVF_W<'_, INT_ENA_SPEC>
pub fn rxfifo_ovf(&mut self) -> RXFIFO_OVF_W<'_, INT_ENA_SPEC>
Bit 4 - This is the enable bit for rxfifo_ovf_int_st register.
sourcepub fn dsr_chg(&mut self) -> DSR_CHG_W<'_, INT_ENA_SPEC>
pub fn dsr_chg(&mut self) -> DSR_CHG_W<'_, INT_ENA_SPEC>
Bit 5 - This is the enable bit for dsr_chg_int_st register.
sourcepub fn cts_chg(&mut self) -> CTS_CHG_W<'_, INT_ENA_SPEC>
pub fn cts_chg(&mut self) -> CTS_CHG_W<'_, INT_ENA_SPEC>
Bit 6 - This is the enable bit for cts_chg_int_st register.
sourcepub fn brk_det(&mut self) -> BRK_DET_W<'_, INT_ENA_SPEC>
pub fn brk_det(&mut self) -> BRK_DET_W<'_, INT_ENA_SPEC>
Bit 7 - This is the enable bit for brk_det_int_st register.
sourcepub fn rxfifo_tout(&mut self) -> RXFIFO_TOUT_W<'_, INT_ENA_SPEC>
pub fn rxfifo_tout(&mut self) -> RXFIFO_TOUT_W<'_, INT_ENA_SPEC>
Bit 8 - This is the enable bit for rxfifo_tout_int_st register.
sourcepub fn sw_xon(&mut self) -> SW_XON_W<'_, INT_ENA_SPEC>
pub fn sw_xon(&mut self) -> SW_XON_W<'_, INT_ENA_SPEC>
Bit 9 - This is the enable bit for sw_xon_int_st register.
sourcepub fn sw_xoff(&mut self) -> SW_XOFF_W<'_, INT_ENA_SPEC>
pub fn sw_xoff(&mut self) -> SW_XOFF_W<'_, INT_ENA_SPEC>
Bit 10 - This is the enable bit for sw_xoff_int_st register.
sourcepub fn glitch_det(&mut self) -> GLITCH_DET_W<'_, INT_ENA_SPEC>
pub fn glitch_det(&mut self) -> GLITCH_DET_W<'_, INT_ENA_SPEC>
Bit 11 - This is the enable bit for glitch_det_int_st register.
sourcepub fn tx_brk_done(&mut self) -> TX_BRK_DONE_W<'_, INT_ENA_SPEC>
pub fn tx_brk_done(&mut self) -> TX_BRK_DONE_W<'_, INT_ENA_SPEC>
Bit 12 - This is the enable bit for tx_brk_done_int_st register.
sourcepub fn tx_brk_idle_done(&mut self) -> TX_BRK_IDLE_DONE_W<'_, INT_ENA_SPEC>
pub fn tx_brk_idle_done(&mut self) -> TX_BRK_IDLE_DONE_W<'_, INT_ENA_SPEC>
Bit 13 - This is the enable bit for tx_brk_idle_done_int_st register.
sourcepub fn tx_done(&mut self) -> TX_DONE_W<'_, INT_ENA_SPEC>
pub fn tx_done(&mut self) -> TX_DONE_W<'_, INT_ENA_SPEC>
Bit 14 - This is the enable bit for tx_done_int_st register.
sourcepub fn rs485_parity_err(&mut self) -> RS485_PARITY_ERR_W<'_, INT_ENA_SPEC>
pub fn rs485_parity_err(&mut self) -> RS485_PARITY_ERR_W<'_, INT_ENA_SPEC>
Bit 15 - This is the enable bit for rs485_parity_err_int_st register.
sourcepub fn rs485_frm_err(&mut self) -> RS485_FRM_ERR_W<'_, INT_ENA_SPEC>
pub fn rs485_frm_err(&mut self) -> RS485_FRM_ERR_W<'_, INT_ENA_SPEC>
Bit 16 - This is the enable bit for rs485_parity_err_int_st register.
sourcepub fn rs485_clash(&mut self) -> RS485_CLASH_W<'_, INT_ENA_SPEC>
pub fn rs485_clash(&mut self) -> RS485_CLASH_W<'_, INT_ENA_SPEC>
Bit 17 - This is the enable bit for rs485_clash_int_st register.
sourcepub fn at_cmd_char_det(&mut self) -> AT_CMD_CHAR_DET_W<'_, INT_ENA_SPEC>
pub fn at_cmd_char_det(&mut self) -> AT_CMD_CHAR_DET_W<'_, INT_ENA_SPEC>
Bit 18 - This is the enable bit for at_cmd_char_det_int_st register.
sourcepub fn wakeup(&mut self) -> WAKEUP_W<'_, INT_ENA_SPEC>
pub fn wakeup(&mut self) -> WAKEUP_W<'_, INT_ENA_SPEC>
Bit 19 - This is the enable bit for uart_wakeup_int_st register.