Module esp32c3::spi2::clock [−][src]
Expand description
SPI clock control register
Structs
Field CLKCNT_H
reader - In the master mode it must be floor((spi_clkcnt_N+1)/2-1). In the slave mode it must be 0. Can be configured in CONF state.
Field CLKCNT_H
writer - In the master mode it must be floor((spi_clkcnt_N+1)/2-1). In the slave mode it must be 0. Can be configured in CONF state.
Field CLKCNT_L
reader - In the master mode it must be equal to spi_clkcnt_N. In the slave mode it must be 0. Can be configured in CONF state.
Field CLKCNT_L
writer - In the master mode it must be equal to spi_clkcnt_N. In the slave mode it must be 0. Can be configured in CONF state.
Field CLKCNT_N
reader - In the master mode it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1). Can be configured in CONF state.
Field CLKCNT_N
writer - In the master mode it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1). Can be configured in CONF state.
Field CLKDIV_PRE
reader - In the master mode it is pre-divider of spi_clk. Can be configured in CONF state.
Field CLKDIV_PRE
writer - In the master mode it is pre-divider of spi_clk. Can be configured in CONF state.
Field CLK_EQU_SYSCLK
reader - In the master mode 1: spi_clk is eqaul to system 0: spi_clk is divided from system clock. Can be configured in CONF state.
Field CLK_EQU_SYSCLK
writer - In the master mode 1: spi_clk is eqaul to system 0: spi_clk is divided from system clock. Can be configured in CONF state.
SPI clock control register
Register CLOCK
reader
Register CLOCK
writer