Module esp32c3_hal::pac::spi0::ctrl1
Expand description
SPI0 control1 register.
Structs
Type Definitions
Field
CLK_MODE
reader - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on.Field
CLK_MODE
writer - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on.Field
RXFIFO_RST
writer - SPI0 RX FIFO reset signal.