1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 fifo: FIFO,
6 int_raw: INT_RAW,
7 int_st: INT_ST,
8 int_ena: INT_ENA,
9 int_clr: INT_CLR,
10 clkdiv: CLKDIV,
11 rx_filt: RX_FILT,
12 status: STATUS,
13 conf0: CONF0,
14 conf1: CONF1,
15 lowpulse: LOWPULSE,
16 highpulse: HIGHPULSE,
17 rxd_cnt: RXD_CNT,
18 flow_conf: FLOW_CONF,
19 sleep_conf: SLEEP_CONF,
20 swfc_conf0: SWFC_CONF0,
21 swfc_conf1: SWFC_CONF1,
22 txbrk_conf: TXBRK_CONF,
23 idle_conf: IDLE_CONF,
24 rs485_conf: RS485_CONF,
25 at_cmd_precnt: AT_CMD_PRECNT,
26 at_cmd_postcnt: AT_CMD_POSTCNT,
27 at_cmd_gaptout: AT_CMD_GAPTOUT,
28 at_cmd_char: AT_CMD_CHAR,
29 mem_conf: MEM_CONF,
30 mem_tx_status: MEM_TX_STATUS,
31 mem_rx_status: MEM_RX_STATUS,
32 fsm_status: FSM_STATUS,
33 pospulse: POSPULSE,
34 negpulse: NEGPULSE,
35 clk_conf: CLK_CONF,
36 date: DATE,
37 id: ID,
38}
39impl RegisterBlock {
40 #[doc = "0x00 - FIFO data register"]
41 #[inline(always)]
42 pub const fn fifo(&self) -> &FIFO {
43 &self.fifo
44 }
45 #[doc = "0x04 - Raw interrupt status"]
46 #[inline(always)]
47 pub const fn int_raw(&self) -> &INT_RAW {
48 &self.int_raw
49 }
50 #[doc = "0x08 - Masked interrupt status"]
51 #[inline(always)]
52 pub const fn int_st(&self) -> &INT_ST {
53 &self.int_st
54 }
55 #[doc = "0x0c - Interrupt enable bits"]
56 #[inline(always)]
57 pub const fn int_ena(&self) -> &INT_ENA {
58 &self.int_ena
59 }
60 #[doc = "0x10 - Interrupt clear bits"]
61 #[inline(always)]
62 pub const fn int_clr(&self) -> &INT_CLR {
63 &self.int_clr
64 }
65 #[doc = "0x14 - Clock divider configuration"]
66 #[inline(always)]
67 pub const fn clkdiv(&self) -> &CLKDIV {
68 &self.clkdiv
69 }
70 #[doc = "0x18 - Rx Filter configuration"]
71 #[inline(always)]
72 pub const fn rx_filt(&self) -> &RX_FILT {
73 &self.rx_filt
74 }
75 #[doc = "0x1c - UART status register"]
76 #[inline(always)]
77 pub const fn status(&self) -> &STATUS {
78 &self.status
79 }
80 #[doc = "0x20 - a"]
81 #[inline(always)]
82 pub const fn conf0(&self) -> &CONF0 {
83 &self.conf0
84 }
85 #[doc = "0x24 - Configuration register 1"]
86 #[inline(always)]
87 pub const fn conf1(&self) -> &CONF1 {
88 &self.conf1
89 }
90 #[doc = "0x28 - Autobaud minimum low pulse duration register"]
91 #[inline(always)]
92 pub const fn lowpulse(&self) -> &LOWPULSE {
93 &self.lowpulse
94 }
95 #[doc = "0x2c - Autobaud minimum high pulse duration register"]
96 #[inline(always)]
97 pub const fn highpulse(&self) -> &HIGHPULSE {
98 &self.highpulse
99 }
100 #[doc = "0x30 - Autobaud edge change count register"]
101 #[inline(always)]
102 pub const fn rxd_cnt(&self) -> &RXD_CNT {
103 &self.rxd_cnt
104 }
105 #[doc = "0x34 - Software flow-control configuration"]
106 #[inline(always)]
107 pub const fn flow_conf(&self) -> &FLOW_CONF {
108 &self.flow_conf
109 }
110 #[doc = "0x38 - Sleep-mode configuration"]
111 #[inline(always)]
112 pub const fn sleep_conf(&self) -> &SLEEP_CONF {
113 &self.sleep_conf
114 }
115 #[doc = "0x3c - Software flow-control character configuration"]
116 #[inline(always)]
117 pub const fn swfc_conf0(&self) -> &SWFC_CONF0 {
118 &self.swfc_conf0
119 }
120 #[doc = "0x40 - Software flow-control character configuration"]
121 #[inline(always)]
122 pub const fn swfc_conf1(&self) -> &SWFC_CONF1 {
123 &self.swfc_conf1
124 }
125 #[doc = "0x44 - Tx Break character configuration"]
126 #[inline(always)]
127 pub const fn txbrk_conf(&self) -> &TXBRK_CONF {
128 &self.txbrk_conf
129 }
130 #[doc = "0x48 - Frame-end idle configuration"]
131 #[inline(always)]
132 pub const fn idle_conf(&self) -> &IDLE_CONF {
133 &self.idle_conf
134 }
135 #[doc = "0x4c - RS485 mode configuration"]
136 #[inline(always)]
137 pub const fn rs485_conf(&self) -> &RS485_CONF {
138 &self.rs485_conf
139 }
140 #[doc = "0x50 - Pre-sequence timing configuration"]
141 #[inline(always)]
142 pub const fn at_cmd_precnt(&self) -> &AT_CMD_PRECNT {
143 &self.at_cmd_precnt
144 }
145 #[doc = "0x54 - Post-sequence timing configuration"]
146 #[inline(always)]
147 pub const fn at_cmd_postcnt(&self) -> &AT_CMD_POSTCNT {
148 &self.at_cmd_postcnt
149 }
150 #[doc = "0x58 - Timeout configuration"]
151 #[inline(always)]
152 pub const fn at_cmd_gaptout(&self) -> &AT_CMD_GAPTOUT {
153 &self.at_cmd_gaptout
154 }
155 #[doc = "0x5c - AT escape sequence detection configuration"]
156 #[inline(always)]
157 pub const fn at_cmd_char(&self) -> &AT_CMD_CHAR {
158 &self.at_cmd_char
159 }
160 #[doc = "0x60 - UART threshold and allocation configuration"]
161 #[inline(always)]
162 pub const fn mem_conf(&self) -> &MEM_CONF {
163 &self.mem_conf
164 }
165 #[doc = "0x64 - Tx-FIFO write and read offset address."]
166 #[inline(always)]
167 pub const fn mem_tx_status(&self) -> &MEM_TX_STATUS {
168 &self.mem_tx_status
169 }
170 #[doc = "0x68 - Rx-FIFO write and read offset address."]
171 #[inline(always)]
172 pub const fn mem_rx_status(&self) -> &MEM_RX_STATUS {
173 &self.mem_rx_status
174 }
175 #[doc = "0x6c - UART transmit and receive status."]
176 #[inline(always)]
177 pub const fn fsm_status(&self) -> &FSM_STATUS {
178 &self.fsm_status
179 }
180 #[doc = "0x70 - Autobaud high pulse register"]
181 #[inline(always)]
182 pub const fn pospulse(&self) -> &POSPULSE {
183 &self.pospulse
184 }
185 #[doc = "0x74 - Autobaud low pulse register"]
186 #[inline(always)]
187 pub const fn negpulse(&self) -> &NEGPULSE {
188 &self.negpulse
189 }
190 #[doc = "0x78 - UART core clock configuration"]
191 #[inline(always)]
192 pub const fn clk_conf(&self) -> &CLK_CONF {
193 &self.clk_conf
194 }
195 #[doc = "0x7c - UART Version register"]
196 #[inline(always)]
197 pub const fn date(&self) -> &DATE {
198 &self.date
199 }
200 #[doc = "0x80 - UART ID register"]
201 #[inline(always)]
202 pub const fn id(&self) -> &ID {
203 &self.id
204 }
205}
206#[doc = "FIFO (rw) register accessor: FIFO data register\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo`] module"]
207pub type FIFO = crate::Reg<fifo::FIFO_SPEC>;
208#[doc = "FIFO data register"]
209pub mod fifo;
210#[doc = "INT_RAW (rw) register accessor: Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
211pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
212#[doc = "Raw interrupt status"]
213pub mod int_raw;
214#[doc = "INT_ST (r) register accessor: Masked interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
215pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
216#[doc = "Masked interrupt status"]
217pub mod int_st;
218#[doc = "INT_ENA (rw) register accessor: Interrupt enable bits\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
219pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
220#[doc = "Interrupt enable bits"]
221pub mod int_ena;
222#[doc = "INT_CLR (w) register accessor: Interrupt clear bits\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
223pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
224#[doc = "Interrupt clear bits"]
225pub mod int_clr;
226#[doc = "CLKDIV (rw) register accessor: Clock divider configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] module"]
227pub type CLKDIV = crate::Reg<clkdiv::CLKDIV_SPEC>;
228#[doc = "Clock divider configuration"]
229pub mod clkdiv;
230#[doc = "RX_FILT (rw) register accessor: Rx Filter configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_filt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_filt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_filt`] module"]
231pub type RX_FILT = crate::Reg<rx_filt::RX_FILT_SPEC>;
232#[doc = "Rx Filter configuration"]
233pub mod rx_filt;
234#[doc = "STATUS (r) register accessor: UART status register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"]
235pub type STATUS = crate::Reg<status::STATUS_SPEC>;
236#[doc = "UART status register"]
237pub mod status;
238#[doc = "CONF0 (rw) register accessor: a\n\nYou can [`read`](crate::Reg::read) this register and get [`conf0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf0`] module"]
239pub type CONF0 = crate::Reg<conf0::CONF0_SPEC>;
240#[doc = "a"]
241pub mod conf0;
242#[doc = "CONF1 (rw) register accessor: Configuration register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`conf1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf1`] module"]
243pub type CONF1 = crate::Reg<conf1::CONF1_SPEC>;
244#[doc = "Configuration register 1"]
245pub mod conf1;
246#[doc = "LOWPULSE (r) register accessor: Autobaud minimum low pulse duration register\n\nYou can [`read`](crate::Reg::read) this register and get [`lowpulse::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lowpulse`] module"]
247pub type LOWPULSE = crate::Reg<lowpulse::LOWPULSE_SPEC>;
248#[doc = "Autobaud minimum low pulse duration register"]
249pub mod lowpulse;
250#[doc = "HIGHPULSE (r) register accessor: Autobaud minimum high pulse duration register\n\nYou can [`read`](crate::Reg::read) this register and get [`highpulse::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@highpulse`] module"]
251pub type HIGHPULSE = crate::Reg<highpulse::HIGHPULSE_SPEC>;
252#[doc = "Autobaud minimum high pulse duration register"]
253pub mod highpulse;
254#[doc = "RXD_CNT (r) register accessor: Autobaud edge change count register\n\nYou can [`read`](crate::Reg::read) this register and get [`rxd_cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxd_cnt`] module"]
255pub type RXD_CNT = crate::Reg<rxd_cnt::RXD_CNT_SPEC>;
256#[doc = "Autobaud edge change count register"]
257pub mod rxd_cnt;
258#[doc = "FLOW_CONF (rw) register accessor: Software flow-control configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`flow_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flow_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flow_conf`] module"]
259pub type FLOW_CONF = crate::Reg<flow_conf::FLOW_CONF_SPEC>;
260#[doc = "Software flow-control configuration"]
261pub mod flow_conf;
262#[doc = "SLEEP_CONF (rw) register accessor: Sleep-mode configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`sleep_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sleep_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sleep_conf`] module"]
263pub type SLEEP_CONF = crate::Reg<sleep_conf::SLEEP_CONF_SPEC>;
264#[doc = "Sleep-mode configuration"]
265pub mod sleep_conf;
266#[doc = "SWFC_CONF0 (rw) register accessor: Software flow-control character configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`swfc_conf0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swfc_conf0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swfc_conf0`] module"]
267pub type SWFC_CONF0 = crate::Reg<swfc_conf0::SWFC_CONF0_SPEC>;
268#[doc = "Software flow-control character configuration"]
269pub mod swfc_conf0;
270#[doc = "SWFC_CONF1 (rw) register accessor: Software flow-control character configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`swfc_conf1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swfc_conf1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swfc_conf1`] module"]
271pub type SWFC_CONF1 = crate::Reg<swfc_conf1::SWFC_CONF1_SPEC>;
272#[doc = "Software flow-control character configuration"]
273pub mod swfc_conf1;
274#[doc = "TXBRK_CONF (rw) register accessor: Tx Break character configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`txbrk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txbrk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbrk_conf`] module"]
275pub type TXBRK_CONF = crate::Reg<txbrk_conf::TXBRK_CONF_SPEC>;
276#[doc = "Tx Break character configuration"]
277pub mod txbrk_conf;
278#[doc = "IDLE_CONF (rw) register accessor: Frame-end idle configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`idle_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`idle_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idle_conf`] module"]
279pub type IDLE_CONF = crate::Reg<idle_conf::IDLE_CONF_SPEC>;
280#[doc = "Frame-end idle configuration"]
281pub mod idle_conf;
282#[doc = "RS485_CONF (rw) register accessor: RS485 mode configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`rs485_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rs485_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rs485_conf`] module"]
283pub type RS485_CONF = crate::Reg<rs485_conf::RS485_CONF_SPEC>;
284#[doc = "RS485 mode configuration"]
285pub mod rs485_conf;
286#[doc = "AT_CMD_PRECNT (rw) register accessor: Pre-sequence timing configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`at_cmd_precnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`at_cmd_precnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_precnt`] module"]
287pub type AT_CMD_PRECNT = crate::Reg<at_cmd_precnt::AT_CMD_PRECNT_SPEC>;
288#[doc = "Pre-sequence timing configuration"]
289pub mod at_cmd_precnt;
290#[doc = "AT_CMD_POSTCNT (rw) register accessor: Post-sequence timing configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`at_cmd_postcnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`at_cmd_postcnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_postcnt`] module"]
291pub type AT_CMD_POSTCNT = crate::Reg<at_cmd_postcnt::AT_CMD_POSTCNT_SPEC>;
292#[doc = "Post-sequence timing configuration"]
293pub mod at_cmd_postcnt;
294#[doc = "AT_CMD_GAPTOUT (rw) register accessor: Timeout configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`at_cmd_gaptout::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`at_cmd_gaptout::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_gaptout`] module"]
295pub type AT_CMD_GAPTOUT = crate::Reg<at_cmd_gaptout::AT_CMD_GAPTOUT_SPEC>;
296#[doc = "Timeout configuration"]
297pub mod at_cmd_gaptout;
298#[doc = "AT_CMD_CHAR (rw) register accessor: AT escape sequence detection configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`at_cmd_char::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`at_cmd_char::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_char`] module"]
299pub type AT_CMD_CHAR = crate::Reg<at_cmd_char::AT_CMD_CHAR_SPEC>;
300#[doc = "AT escape sequence detection configuration"]
301pub mod at_cmd_char;
302#[doc = "MEM_CONF (rw) register accessor: UART threshold and allocation configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mem_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_conf`] module"]
303pub type MEM_CONF = crate::Reg<mem_conf::MEM_CONF_SPEC>;
304#[doc = "UART threshold and allocation configuration"]
305pub mod mem_conf;
306#[doc = "MEM_TX_STATUS (r) register accessor: Tx-FIFO write and read offset address.\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_tx_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_tx_status`] module"]
307pub type MEM_TX_STATUS = crate::Reg<mem_tx_status::MEM_TX_STATUS_SPEC>;
308#[doc = "Tx-FIFO write and read offset address."]
309pub mod mem_tx_status;
310#[doc = "MEM_RX_STATUS (r) register accessor: Rx-FIFO write and read offset address.\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_rx_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_rx_status`] module"]
311pub type MEM_RX_STATUS = crate::Reg<mem_rx_status::MEM_RX_STATUS_SPEC>;
312#[doc = "Rx-FIFO write and read offset address."]
313pub mod mem_rx_status;
314#[doc = "FSM_STATUS (r) register accessor: UART transmit and receive status.\n\nYou can [`read`](crate::Reg::read) this register and get [`fsm_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fsm_status`] module"]
315pub type FSM_STATUS = crate::Reg<fsm_status::FSM_STATUS_SPEC>;
316#[doc = "UART transmit and receive status."]
317pub mod fsm_status;
318#[doc = "POSPULSE (r) register accessor: Autobaud high pulse register\n\nYou can [`read`](crate::Reg::read) this register and get [`pospulse::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pospulse`] module"]
319pub type POSPULSE = crate::Reg<pospulse::POSPULSE_SPEC>;
320#[doc = "Autobaud high pulse register"]
321pub mod pospulse;
322#[doc = "NEGPULSE (r) register accessor: Autobaud low pulse register\n\nYou can [`read`](crate::Reg::read) this register and get [`negpulse::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@negpulse`] module"]
323pub type NEGPULSE = crate::Reg<negpulse::NEGPULSE_SPEC>;
324#[doc = "Autobaud low pulse register"]
325pub mod negpulse;
326#[doc = "CLK_CONF (rw) register accessor: UART core clock configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_conf`] module"]
327pub type CLK_CONF = crate::Reg<clk_conf::CLK_CONF_SPEC>;
328#[doc = "UART core clock configuration"]
329pub mod clk_conf;
330#[doc = "DATE (rw) register accessor: UART Version register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
331pub type DATE = crate::Reg<date::DATE_SPEC>;
332#[doc = "UART Version register"]
333pub mod date;
334#[doc = "ID (rw) register accessor: UART ID register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`id::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"]
335pub type ID = crate::Reg<id::ID_SPEC>;
336#[doc = "UART ID register"]
337pub mod id;