esp32c2/system/
perip_rst_en0.rs1#[doc = "Register `PERIP_RST_EN0` reader"]
2pub type R = crate::R<PERIP_RST_EN0_SPEC>;
3#[doc = "Register `PERIP_RST_EN0` writer"]
4pub type W = crate::W<PERIP_RST_EN0_SPEC>;
5#[doc = "Field `SPI01_RST` reader - Set 1 to let SPI01 reset"]
6pub type SPI01_RST_R = crate::BitReader;
7#[doc = "Field `SPI01_RST` writer - Set 1 to let SPI01 reset"]
8pub type SPI01_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `UART_RST` reader - Set 1 to let UART reset"]
10pub type UART_RST_R = crate::BitReader;
11#[doc = "Field `UART_RST` writer - Set 1 to let UART reset"]
12pub type UART_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `UART1_RST` reader - Set 1 to let UART1 reset"]
14pub type UART1_RST_R = crate::BitReader;
15#[doc = "Field `UART1_RST` writer - Set 1 to let UART1 reset"]
16pub type UART1_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SPI2_RST` reader - Set 1 to let SPI2 reset"]
18pub type SPI2_RST_R = crate::BitReader;
19#[doc = "Field `SPI2_RST` writer - Set 1 to let SPI2 reset"]
20pub type SPI2_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `I2C_EXT0_RST` reader - Set 1 to let I2C_EXT0 reset"]
22pub type I2C_EXT0_RST_R = crate::BitReader;
23#[doc = "Field `I2C_EXT0_RST` writer - Set 1 to let I2C_EXT0 reset"]
24pub type I2C_EXT0_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `LEDC_RST` reader - Set 1 to let LEDC reset"]
26pub type LEDC_RST_R = crate::BitReader;
27#[doc = "Field `LEDC_RST` writer - Set 1 to let LEDC reset"]
28pub type LEDC_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `TIMERGROUP_RST` reader - Set 1 to let TIMERGROUP reset"]
30pub type TIMERGROUP_RST_R = crate::BitReader;
31#[doc = "Field `TIMERGROUP_RST` writer - Set 1 to let TIMERGROUP reset"]
32pub type TIMERGROUP_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `UART_MEM_RST` reader - Set 1 to let UART_MEM reset"]
34pub type UART_MEM_RST_R = crate::BitReader;
35#[doc = "Field `UART_MEM_RST` writer - Set 1 to let UART_MEM reset"]
36pub type UART_MEM_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `APB_SARADC_RST` reader - Set 1 to let APB_SARADC reset"]
38pub type APB_SARADC_RST_R = crate::BitReader;
39#[doc = "Field `APB_SARADC_RST` writer - Set 1 to let APB_SARADC reset"]
40pub type APB_SARADC_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `SYSTIMER_RST` reader - Set 1 to let SYSTIMER reset"]
42pub type SYSTIMER_RST_R = crate::BitReader;
43#[doc = "Field `SYSTIMER_RST` writer - Set 1 to let SYSTIMER reset"]
44pub type SYSTIMER_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `ADC2_ARB_RST` reader - Set 1 to let ADC2_ARB reset"]
46pub type ADC2_ARB_RST_R = crate::BitReader;
47#[doc = "Field `ADC2_ARB_RST` writer - Set 1 to let ADC2_ARB reset"]
48pub type ADC2_ARB_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
49impl R {
50 #[doc = "Bit 1 - Set 1 to let SPI01 reset"]
51 #[inline(always)]
52 pub fn spi01_rst(&self) -> SPI01_RST_R {
53 SPI01_RST_R::new(((self.bits >> 1) & 1) != 0)
54 }
55 #[doc = "Bit 2 - Set 1 to let UART reset"]
56 #[inline(always)]
57 pub fn uart_rst(&self) -> UART_RST_R {
58 UART_RST_R::new(((self.bits >> 2) & 1) != 0)
59 }
60 #[doc = "Bit 5 - Set 1 to let UART1 reset"]
61 #[inline(always)]
62 pub fn uart1_rst(&self) -> UART1_RST_R {
63 UART1_RST_R::new(((self.bits >> 5) & 1) != 0)
64 }
65 #[doc = "Bit 6 - Set 1 to let SPI2 reset"]
66 #[inline(always)]
67 pub fn spi2_rst(&self) -> SPI2_RST_R {
68 SPI2_RST_R::new(((self.bits >> 6) & 1) != 0)
69 }
70 #[doc = "Bit 7 - Set 1 to let I2C_EXT0 reset"]
71 #[inline(always)]
72 pub fn i2c_ext0_rst(&self) -> I2C_EXT0_RST_R {
73 I2C_EXT0_RST_R::new(((self.bits >> 7) & 1) != 0)
74 }
75 #[doc = "Bit 11 - Set 1 to let LEDC reset"]
76 #[inline(always)]
77 pub fn ledc_rst(&self) -> LEDC_RST_R {
78 LEDC_RST_R::new(((self.bits >> 11) & 1) != 0)
79 }
80 #[doc = "Bit 13 - Set 1 to let TIMERGROUP reset"]
81 #[inline(always)]
82 pub fn timergroup_rst(&self) -> TIMERGROUP_RST_R {
83 TIMERGROUP_RST_R::new(((self.bits >> 13) & 1) != 0)
84 }
85 #[doc = "Bit 24 - Set 1 to let UART_MEM reset"]
86 #[inline(always)]
87 pub fn uart_mem_rst(&self) -> UART_MEM_RST_R {
88 UART_MEM_RST_R::new(((self.bits >> 24) & 1) != 0)
89 }
90 #[doc = "Bit 28 - Set 1 to let APB_SARADC reset"]
91 #[inline(always)]
92 pub fn apb_saradc_rst(&self) -> APB_SARADC_RST_R {
93 APB_SARADC_RST_R::new(((self.bits >> 28) & 1) != 0)
94 }
95 #[doc = "Bit 29 - Set 1 to let SYSTIMER reset"]
96 #[inline(always)]
97 pub fn systimer_rst(&self) -> SYSTIMER_RST_R {
98 SYSTIMER_RST_R::new(((self.bits >> 29) & 1) != 0)
99 }
100 #[doc = "Bit 30 - Set 1 to let ADC2_ARB reset"]
101 #[inline(always)]
102 pub fn adc2_arb_rst(&self) -> ADC2_ARB_RST_R {
103 ADC2_ARB_RST_R::new(((self.bits >> 30) & 1) != 0)
104 }
105}
106#[cfg(feature = "impl-register-debug")]
107impl core::fmt::Debug for R {
108 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
109 f.debug_struct("PERIP_RST_EN0")
110 .field("spi01_rst", &self.spi01_rst())
111 .field("uart_rst", &self.uart_rst())
112 .field("uart1_rst", &self.uart1_rst())
113 .field("spi2_rst", &self.spi2_rst())
114 .field("i2c_ext0_rst", &self.i2c_ext0_rst())
115 .field("ledc_rst", &self.ledc_rst())
116 .field("timergroup_rst", &self.timergroup_rst())
117 .field("uart_mem_rst", &self.uart_mem_rst())
118 .field("apb_saradc_rst", &self.apb_saradc_rst())
119 .field("systimer_rst", &self.systimer_rst())
120 .field("adc2_arb_rst", &self.adc2_arb_rst())
121 .finish()
122 }
123}
124impl W {
125 #[doc = "Bit 1 - Set 1 to let SPI01 reset"]
126 #[inline(always)]
127 pub fn spi01_rst(&mut self) -> SPI01_RST_W<PERIP_RST_EN0_SPEC> {
128 SPI01_RST_W::new(self, 1)
129 }
130 #[doc = "Bit 2 - Set 1 to let UART reset"]
131 #[inline(always)]
132 pub fn uart_rst(&mut self) -> UART_RST_W<PERIP_RST_EN0_SPEC> {
133 UART_RST_W::new(self, 2)
134 }
135 #[doc = "Bit 5 - Set 1 to let UART1 reset"]
136 #[inline(always)]
137 pub fn uart1_rst(&mut self) -> UART1_RST_W<PERIP_RST_EN0_SPEC> {
138 UART1_RST_W::new(self, 5)
139 }
140 #[doc = "Bit 6 - Set 1 to let SPI2 reset"]
141 #[inline(always)]
142 pub fn spi2_rst(&mut self) -> SPI2_RST_W<PERIP_RST_EN0_SPEC> {
143 SPI2_RST_W::new(self, 6)
144 }
145 #[doc = "Bit 7 - Set 1 to let I2C_EXT0 reset"]
146 #[inline(always)]
147 pub fn i2c_ext0_rst(&mut self) -> I2C_EXT0_RST_W<PERIP_RST_EN0_SPEC> {
148 I2C_EXT0_RST_W::new(self, 7)
149 }
150 #[doc = "Bit 11 - Set 1 to let LEDC reset"]
151 #[inline(always)]
152 pub fn ledc_rst(&mut self) -> LEDC_RST_W<PERIP_RST_EN0_SPEC> {
153 LEDC_RST_W::new(self, 11)
154 }
155 #[doc = "Bit 13 - Set 1 to let TIMERGROUP reset"]
156 #[inline(always)]
157 pub fn timergroup_rst(&mut self) -> TIMERGROUP_RST_W<PERIP_RST_EN0_SPEC> {
158 TIMERGROUP_RST_W::new(self, 13)
159 }
160 #[doc = "Bit 24 - Set 1 to let UART_MEM reset"]
161 #[inline(always)]
162 pub fn uart_mem_rst(&mut self) -> UART_MEM_RST_W<PERIP_RST_EN0_SPEC> {
163 UART_MEM_RST_W::new(self, 24)
164 }
165 #[doc = "Bit 28 - Set 1 to let APB_SARADC reset"]
166 #[inline(always)]
167 pub fn apb_saradc_rst(&mut self) -> APB_SARADC_RST_W<PERIP_RST_EN0_SPEC> {
168 APB_SARADC_RST_W::new(self, 28)
169 }
170 #[doc = "Bit 29 - Set 1 to let SYSTIMER reset"]
171 #[inline(always)]
172 pub fn systimer_rst(&mut self) -> SYSTIMER_RST_W<PERIP_RST_EN0_SPEC> {
173 SYSTIMER_RST_W::new(self, 29)
174 }
175 #[doc = "Bit 30 - Set 1 to let ADC2_ARB reset"]
176 #[inline(always)]
177 pub fn adc2_arb_rst(&mut self) -> ADC2_ARB_RST_W<PERIP_RST_EN0_SPEC> {
178 ADC2_ARB_RST_W::new(self, 30)
179 }
180}
181#[doc = "reserved\n\nYou can [`read`](crate::Reg::read) this register and get [`perip_rst_en0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`perip_rst_en0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
182pub struct PERIP_RST_EN0_SPEC;
183impl crate::RegisterSpec for PERIP_RST_EN0_SPEC {
184 type Ux = u32;
185}
186#[doc = "`read()` method returns [`perip_rst_en0::R`](R) reader structure"]
187impl crate::Readable for PERIP_RST_EN0_SPEC {}
188#[doc = "`write(|w| ..)` method takes [`perip_rst_en0::W`](W) writer structure"]
189impl crate::Writable for PERIP_RST_EN0_SPEC {
190 type Safety = crate::Unsafe;
191 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
192 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
193}
194#[doc = "`reset()` method sets PERIP_RST_EN0 to value 0"]
195impl crate::Resettable for PERIP_RST_EN0_SPEC {
196 const RESET_VALUE: u32 = 0;
197}