esp32c2/spi1/
flash_waiti_ctrl.rs

1#[doc = "Register `FLASH_WAITI_CTRL` reader"]
2pub type R = crate::R<FLASH_WAITI_CTRL_SPEC>;
3#[doc = "Register `FLASH_WAITI_CTRL` writer"]
4pub type W = crate::W<FLASH_WAITI_CTRL_SPEC>;
5#[doc = "Field `WAITI_DUMMY` reader - The dummy phase enable when wait flash idle (RDSR)"]
6pub type WAITI_DUMMY_R = crate::BitReader;
7#[doc = "Field `WAITI_DUMMY` writer - The dummy phase enable when wait flash idle (RDSR)"]
8pub type WAITI_DUMMY_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `WAITI_CMD` reader - The command to wait flash idle(RDSR)."]
10pub type WAITI_CMD_R = crate::FieldReader;
11#[doc = "Field `WAITI_CMD` writer - The command to wait flash idle(RDSR)."]
12pub type WAITI_CMD_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `WAITI_DUMMY_CYCLELEN` reader - The dummy cycle length when wait flash idle(RDSR)."]
14pub type WAITI_DUMMY_CYCLELEN_R = crate::FieldReader;
15#[doc = "Field `WAITI_DUMMY_CYCLELEN` writer - The dummy cycle length when wait flash idle(RDSR)."]
16pub type WAITI_DUMMY_CYCLELEN_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
17impl R {
18    #[doc = "Bit 1 - The dummy phase enable when wait flash idle (RDSR)"]
19    #[inline(always)]
20    pub fn waiti_dummy(&self) -> WAITI_DUMMY_R {
21        WAITI_DUMMY_R::new(((self.bits >> 1) & 1) != 0)
22    }
23    #[doc = "Bits 2:9 - The command to wait flash idle(RDSR)."]
24    #[inline(always)]
25    pub fn waiti_cmd(&self) -> WAITI_CMD_R {
26        WAITI_CMD_R::new(((self.bits >> 2) & 0xff) as u8)
27    }
28    #[doc = "Bits 10:15 - The dummy cycle length when wait flash idle(RDSR)."]
29    #[inline(always)]
30    pub fn waiti_dummy_cyclelen(&self) -> WAITI_DUMMY_CYCLELEN_R {
31        WAITI_DUMMY_CYCLELEN_R::new(((self.bits >> 10) & 0x3f) as u8)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("FLASH_WAITI_CTRL")
38            .field("waiti_dummy", &self.waiti_dummy())
39            .field("waiti_cmd", &self.waiti_cmd())
40            .field("waiti_dummy_cyclelen", &self.waiti_dummy_cyclelen())
41            .finish()
42    }
43}
44impl W {
45    #[doc = "Bit 1 - The dummy phase enable when wait flash idle (RDSR)"]
46    #[inline(always)]
47    pub fn waiti_dummy(&mut self) -> WAITI_DUMMY_W<FLASH_WAITI_CTRL_SPEC> {
48        WAITI_DUMMY_W::new(self, 1)
49    }
50    #[doc = "Bits 2:9 - The command to wait flash idle(RDSR)."]
51    #[inline(always)]
52    pub fn waiti_cmd(&mut self) -> WAITI_CMD_W<FLASH_WAITI_CTRL_SPEC> {
53        WAITI_CMD_W::new(self, 2)
54    }
55    #[doc = "Bits 10:15 - The dummy cycle length when wait flash idle(RDSR)."]
56    #[inline(always)]
57    pub fn waiti_dummy_cyclelen(&mut self) -> WAITI_DUMMY_CYCLELEN_W<FLASH_WAITI_CTRL_SPEC> {
58        WAITI_DUMMY_CYCLELEN_W::new(self, 10)
59    }
60}
61#[doc = "SPI1 wait idle control register\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_waiti_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_waiti_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct FLASH_WAITI_CTRL_SPEC;
63impl crate::RegisterSpec for FLASH_WAITI_CTRL_SPEC {
64    type Ux = u32;
65}
66#[doc = "`read()` method returns [`flash_waiti_ctrl::R`](R) reader structure"]
67impl crate::Readable for FLASH_WAITI_CTRL_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`flash_waiti_ctrl::W`](W) writer structure"]
69impl crate::Writable for FLASH_WAITI_CTRL_SPEC {
70    type Safety = crate::Unsafe;
71    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
73}
74#[doc = "`reset()` method sets FLASH_WAITI_CTRL to value 0x14"]
75impl crate::Resettable for FLASH_WAITI_CTRL_SPEC {
76    const RESET_VALUE: u32 = 0x14;
77}
esp32c2/spi1/flash_waiti_ctrl.rs

esp32c2/spi1/
flash_waiti_ctrl.rs
