esp32c2/sensitive/
internal_sram_usage_1.rs

1#[doc = "Register `INTERNAL_SRAM_USAGE_1` reader"]
2pub type R = crate::R<INTERNAL_SRAM_USAGE_1_SPEC>;
3#[doc = "Register `INTERNAL_SRAM_USAGE_1` writer"]
4pub type W = crate::W<INTERNAL_SRAM_USAGE_1_SPEC>;
5#[doc = "Field `INTERNAL_SRAM_USAGE_CPU_CACHE` reader - Need add description"]
6pub type INTERNAL_SRAM_USAGE_CPU_CACHE_R = crate::BitReader;
7#[doc = "Field `INTERNAL_SRAM_USAGE_CPU_CACHE` writer - Need add description"]
8pub type INTERNAL_SRAM_USAGE_CPU_CACHE_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `INTERNAL_SRAM_USAGE_CPU_SRAM` reader - Need add description"]
10pub type INTERNAL_SRAM_USAGE_CPU_SRAM_R = crate::FieldReader;
11#[doc = "Field `INTERNAL_SRAM_USAGE_CPU_SRAM` writer - Need add description"]
12pub type INTERNAL_SRAM_USAGE_CPU_SRAM_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13impl R {
14    #[doc = "Bit 0 - Need add description"]
15    #[inline(always)]
16    pub fn internal_sram_usage_cpu_cache(&self) -> INTERNAL_SRAM_USAGE_CPU_CACHE_R {
17        INTERNAL_SRAM_USAGE_CPU_CACHE_R::new((self.bits & 1) != 0)
18    }
19    #[doc = "Bits 1:3 - Need add description"]
20    #[inline(always)]
21    pub fn internal_sram_usage_cpu_sram(&self) -> INTERNAL_SRAM_USAGE_CPU_SRAM_R {
22        INTERNAL_SRAM_USAGE_CPU_SRAM_R::new(((self.bits >> 1) & 7) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("INTERNAL_SRAM_USAGE_1")
29            .field(
30                "internal_sram_usage_cpu_cache",
31                &self.internal_sram_usage_cpu_cache(),
32            )
33            .field(
34                "internal_sram_usage_cpu_sram",
35                &self.internal_sram_usage_cpu_sram(),
36            )
37            .finish()
38    }
39}
40impl W {
41    #[doc = "Bit 0 - Need add description"]
42    #[inline(always)]
43    pub fn internal_sram_usage_cpu_cache(
44        &mut self,
45    ) -> INTERNAL_SRAM_USAGE_CPU_CACHE_W<INTERNAL_SRAM_USAGE_1_SPEC> {
46        INTERNAL_SRAM_USAGE_CPU_CACHE_W::new(self, 0)
47    }
48    #[doc = "Bits 1:3 - Need add description"]
49    #[inline(always)]
50    pub fn internal_sram_usage_cpu_sram(
51        &mut self,
52    ) -> INTERNAL_SRAM_USAGE_CPU_SRAM_W<INTERNAL_SRAM_USAGE_1_SPEC> {
53        INTERNAL_SRAM_USAGE_CPU_SRAM_W::new(self, 1)
54    }
55}
56#[doc = "register description\n\nYou can [`read`](crate::Reg::read) this register and get [`internal_sram_usage_1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`internal_sram_usage_1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
57pub struct INTERNAL_SRAM_USAGE_1_SPEC;
58impl crate::RegisterSpec for INTERNAL_SRAM_USAGE_1_SPEC {
59    type Ux = u32;
60}
61#[doc = "`read()` method returns [`internal_sram_usage_1::R`](R) reader structure"]
62impl crate::Readable for INTERNAL_SRAM_USAGE_1_SPEC {}
63#[doc = "`write(|w| ..)` method takes [`internal_sram_usage_1::W`](W) writer structure"]
64impl crate::Writable for INTERNAL_SRAM_USAGE_1_SPEC {
65    type Safety = crate::Unsafe;
66    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
67    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
68}
69#[doc = "`reset()` method sets INTERNAL_SRAM_USAGE_1 to value 0x0f"]
70impl crate::Resettable for INTERNAL_SRAM_USAGE_1_SPEC {
71    const RESET_VALUE: u32 = 0x0f;
72}
esp32c2/sensitive/internal_sram_usage_1.rs

esp32c2/sensitive/
internal_sram_usage_1.rs
