esp32c2/rtc_cntl/
timer5.rs

1#[doc = "Register `TIMER5` reader"]
2pub type R = crate::R<TIMER5_SPEC>;
3#[doc = "Register `TIMER5` writer"]
4pub type W = crate::W<TIMER5_SPEC>;
5#[doc = "Field `MIN_SLP_VAL` reader - minimal sleep cycles in slow_clk_rtc"]
6pub type MIN_SLP_VAL_R = crate::FieldReader;
7#[doc = "Field `MIN_SLP_VAL` writer - minimal sleep cycles in slow_clk_rtc"]
8pub type MIN_SLP_VAL_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9impl R {
10    #[doc = "Bits 8:15 - minimal sleep cycles in slow_clk_rtc"]
11    #[inline(always)]
12    pub fn min_slp_val(&self) -> MIN_SLP_VAL_R {
13        MIN_SLP_VAL_R::new(((self.bits >> 8) & 0xff) as u8)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("TIMER5")
20            .field("min_slp_val", &self.min_slp_val())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bits 8:15 - minimal sleep cycles in slow_clk_rtc"]
26    #[inline(always)]
27    pub fn min_slp_val(&mut self) -> MIN_SLP_VAL_W<TIMER5_SPEC> {
28        MIN_SLP_VAL_W::new(self, 8)
29    }
30}
31#[doc = "register description\n\nYou can [`read`](crate::Reg::read) this register and get [`timer5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct TIMER5_SPEC;
33impl crate::RegisterSpec for TIMER5_SPEC {
34    type Ux = u32;
35}
36#[doc = "`read()` method returns [`timer5::R`](R) reader structure"]
37impl crate::Readable for TIMER5_SPEC {}
38#[doc = "`write(|w| ..)` method takes [`timer5::W`](W) writer structure"]
39impl crate::Writable for TIMER5_SPEC {
40    type Safety = crate::Unsafe;
41    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
42    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43}
44#[doc = "`reset()` method sets TIMER5 to value 0x8000"]
45impl crate::Resettable for TIMER5_SPEC {
46    const RESET_VALUE: u32 = 0x8000;
47}
esp32c2/rtc_cntl/timer5.rs

esp32c2/rtc_cntl/
timer5.rs
