1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 ch: [CH; 6],
6 _reserved1: [u8; 0x28],
7 timer: [TIMER; 4],
8 int_raw: INT_RAW,
9 int_st: INT_ST,
10 int_ena: INT_ENA,
11 int_clr: INT_CLR,
12 conf: CONF,
13 _reserved7: [u8; 0x28],
14 date: DATE,
15}
16impl RegisterBlock {
17 #[doc = "0x00..0x78 - Cluster CH%s, containing CH?_CONF0, CH?_HPOINT, CH?_DUTY, CH?_CONF1, CH?_DUTY_R"]
18 #[inline(always)]
19 pub const fn ch(&self, n: usize) -> &CH {
20 &self.ch[n]
21 }
22 #[doc = "Iterator for array of:"]
23 #[doc = "0x00..0x78 - Cluster CH%s, containing CH?_CONF0, CH?_HPOINT, CH?_DUTY, CH?_CONF1, CH?_DUTY_R"]
24 #[inline(always)]
25 pub fn ch_iter(&self) -> impl Iterator<Item = &CH> {
26 self.ch.iter()
27 }
28 #[doc = "0xa0..0xc0 - Cluster TIMER%s, containing TIMER?_CONF, TIMER?_VALUE"]
29 #[inline(always)]
30 pub const fn timer(&self, n: usize) -> &TIMER {
31 &self.timer[n]
32 }
33 #[doc = "Iterator for array of:"]
34 #[doc = "0xa0..0xc0 - Cluster TIMER%s, containing TIMER?_CONF, TIMER?_VALUE"]
35 #[inline(always)]
36 pub fn timer_iter(&self) -> impl Iterator<Item = &TIMER> {
37 self.timer.iter()
38 }
39 #[doc = "0xc0 - Raw interrupt status"]
40 #[inline(always)]
41 pub const fn int_raw(&self) -> &INT_RAW {
42 &self.int_raw
43 }
44 #[doc = "0xc4 - Masked interrupt status"]
45 #[inline(always)]
46 pub const fn int_st(&self) -> &INT_ST {
47 &self.int_st
48 }
49 #[doc = "0xc8 - Interrupt enable bits"]
50 #[inline(always)]
51 pub const fn int_ena(&self) -> &INT_ENA {
52 &self.int_ena
53 }
54 #[doc = "0xcc - Interrupt clear bits"]
55 #[inline(always)]
56 pub const fn int_clr(&self) -> &INT_CLR {
57 &self.int_clr
58 }
59 #[doc = "0xd0 - Global ledc configuration register"]
60 #[inline(always)]
61 pub const fn conf(&self) -> &CONF {
62 &self.conf
63 }
64 #[doc = "0xfc - Version control register"]
65 #[inline(always)]
66 pub const fn date(&self) -> &DATE {
67 &self.date
68 }
69}
70#[doc = "Cluster CH%s, containing CH?_CONF0, CH?_HPOINT, CH?_DUTY, CH?_CONF1, CH?_DUTY_R"]
71pub use self::ch::CH;
72#[doc = r"Cluster"]
73#[doc = "Cluster CH%s, containing CH?_CONF0, CH?_HPOINT, CH?_DUTY, CH?_CONF1, CH?_DUTY_R"]
74pub mod ch;
75#[doc = "Cluster TIMER%s, containing TIMER?_CONF, TIMER?_VALUE"]
76pub use self::timer::TIMER;
77#[doc = r"Cluster"]
78#[doc = "Cluster TIMER%s, containing TIMER?_CONF, TIMER?_VALUE"]
79pub mod timer;
80#[doc = "INT_RAW (rw) register accessor: Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
81pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
82#[doc = "Raw interrupt status"]
83pub mod int_raw;
84#[doc = "INT_ST (r) register accessor: Masked interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
85pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
86#[doc = "Masked interrupt status"]
87pub mod int_st;
88#[doc = "INT_ENA (rw) register accessor: Interrupt enable bits\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
89pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
90#[doc = "Interrupt enable bits"]
91pub mod int_ena;
92#[doc = "INT_CLR (w) register accessor: Interrupt clear bits\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
93pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
94#[doc = "Interrupt clear bits"]
95pub mod int_clr;
96#[doc = "CONF (rw) register accessor: Global ledc configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf`] module"]
97pub type CONF = crate::Reg<conf::CONF_SPEC>;
98#[doc = "Global ledc configuration register"]
99pub mod conf;
100#[doc = "DATE (rw) register accessor: Version control register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
101pub type DATE = crate::Reg<date::DATE_SPEC>;
102#[doc = "Version control register"]
103pub mod date;