esp32c2/interrupt_core0/
cpu_int_eip_status.rs

1#[doc = "Register `CPU_INT_EIP_STATUS` reader"]
2pub type R = crate::R<CPU_INT_EIP_STATUS_SPEC>;
3#[doc = "Field `CPU_INT_EIP_STATUS` reader - Need add description"]
4pub type CPU_INT_EIP_STATUS_R = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:31 - Need add description"]
7    #[inline(always)]
8    pub fn cpu_int_eip_status(&self) -> CPU_INT_EIP_STATUS_R {
9        CPU_INT_EIP_STATUS_R::new(self.bits)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("CPU_INT_EIP_STATUS")
16            .field("cpu_int_eip_status", &self.cpu_int_eip_status())
17            .finish()
18    }
19}
20#[doc = "register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_eip_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct CPU_INT_EIP_STATUS_SPEC;
22impl crate::RegisterSpec for CPU_INT_EIP_STATUS_SPEC {
23    type Ux = u32;
24}
25#[doc = "`read()` method returns [`cpu_int_eip_status::R`](R) reader structure"]
26impl crate::Readable for CPU_INT_EIP_STATUS_SPEC {}
27#[doc = "`reset()` method sets CPU_INT_EIP_STATUS to value 0"]
28impl crate::Resettable for CPU_INT_EIP_STATUS_SPEC {
29    const RESET_VALUE: u32 = 0;
30}
esp32c2/interrupt_core0/cpu_int_eip_status.rs

esp32c2/interrupt_core0/
cpu_int_eip_status.rs
