1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 mac_intr_map: MAC_INTR_MAP,
6 wifi_mac_nmi_map: WIFI_MAC_NMI_MAP,
7 wifi_pwr_int_map: WIFI_PWR_INT_MAP,
8 wifi_bb_int_map: WIFI_BB_INT_MAP,
9 bt_mac_int_map: BT_MAC_INT_MAP,
10 bt_bb_int_map: BT_BB_INT_MAP,
11 bt_bb_nmi_map: BT_BB_NMI_MAP,
12 lp_timer_int_map: LP_TIMER_INT_MAP,
13 coex_int_map: COEX_INT_MAP,
14 ble_timer_int_map: BLE_TIMER_INT_MAP,
15 ble_sec_int_map: BLE_SEC_INT_MAP,
16 i2c_mst_int_map: I2C_MST_INT_MAP,
17 apb_ctrl_intr_map: APB_CTRL_INTR_MAP,
18 gpio_interrupt_pro_map: GPIO_INTERRUPT_PRO_MAP,
19 gpio_interrupt_pro_nmi_map: GPIO_INTERRUPT_PRO_NMI_MAP,
20 spi_intr_1_map: SPI_INTR_1_MAP,
21 spi_intr_2_map: SPI_INTR_2_MAP,
22 uart_intr_map: UART_INTR_MAP,
23 uart1_intr_map: UART1_INTR_MAP,
24 ledc_int_map: LEDC_INT_MAP,
25 efuse_int_map: EFUSE_INT_MAP,
26 rtc_core_intr_map: RTC_CORE_INTR_MAP,
27 i2c_ext0_intr_map: I2C_EXT0_INTR_MAP,
28 tg_t0_int_map: TG_T0_INT_MAP,
29 tg_wdt_int_map: TG_WDT_INT_MAP,
30 cache_ia_int_map: CACHE_IA_INT_MAP,
31 systimer_target0_int_map: SYSTIMER_TARGET0_INT_MAP,
32 systimer_target1_int_map: SYSTIMER_TARGET1_INT_MAP,
33 systimer_target2_int_map: SYSTIMER_TARGET2_INT_MAP,
34 spi_mem_reject_intr_map: SPI_MEM_REJECT_INTR_MAP,
35 icache_preload_int_map: ICACHE_PRELOAD_INT_MAP,
36 icache_sync_int_map: ICACHE_SYNC_INT_MAP,
37 apb_adc_int_map: APB_ADC_INT_MAP,
38 dma_ch0_int_map: DMA_CH0_INT_MAP,
39 sha_int_map: SHA_INT_MAP,
40 ecc_int_map: ECC_INT_MAP,
41 cpu_intr_from_cpu_0_map: CPU_INTR_FROM_CPU_0_MAP,
42 cpu_intr_from_cpu_1_map: CPU_INTR_FROM_CPU_1_MAP,
43 cpu_intr_from_cpu_2_map: CPU_INTR_FROM_CPU_2_MAP,
44 cpu_intr_from_cpu_3_map: CPU_INTR_FROM_CPU_3_MAP,
45 assist_debug_intr_map: ASSIST_DEBUG_INTR_MAP,
46 core_0_pif_pms_monitor_violate_size_intr_map: CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP,
47 cache_core0_acs_int_map: CACHE_CORE0_ACS_INT_MAP,
48 intr_status_reg_0: INTR_STATUS_REG_0,
49 intr_status_reg_1: INTR_STATUS_REG_1,
50 clock_gate: CLOCK_GATE,
51 cpu_int_enable: CPU_INT_ENABLE,
52 cpu_int_type: CPU_INT_TYPE,
53 cpu_int_clear: CPU_INT_CLEAR,
54 cpu_int_eip_status: CPU_INT_EIP_STATUS,
55 cpu_int_pri: [CPU_INT_PRI; 32],
56 cpu_int_thresh: CPU_INT_THRESH,
57 _reserved52: [u8; 0x06b0],
58 interrupt_reg_date: INTERRUPT_REG_DATE,
59}
60impl RegisterBlock {
61 #[doc = "0x00 - register description"]
62 #[inline(always)]
63 pub const fn mac_intr_map(&self) -> &MAC_INTR_MAP {
64 &self.mac_intr_map
65 }
66 #[doc = "0x04 - register description"]
67 #[inline(always)]
68 pub const fn wifi_mac_nmi_map(&self) -> &WIFI_MAC_NMI_MAP {
69 &self.wifi_mac_nmi_map
70 }
71 #[doc = "0x08 - register description"]
72 #[inline(always)]
73 pub const fn wifi_pwr_int_map(&self) -> &WIFI_PWR_INT_MAP {
74 &self.wifi_pwr_int_map
75 }
76 #[doc = "0x0c - register description"]
77 #[inline(always)]
78 pub const fn wifi_bb_int_map(&self) -> &WIFI_BB_INT_MAP {
79 &self.wifi_bb_int_map
80 }
81 #[doc = "0x10 - register description"]
82 #[inline(always)]
83 pub const fn bt_mac_int_map(&self) -> &BT_MAC_INT_MAP {
84 &self.bt_mac_int_map
85 }
86 #[doc = "0x14 - register description"]
87 #[inline(always)]
88 pub const fn bt_bb_int_map(&self) -> &BT_BB_INT_MAP {
89 &self.bt_bb_int_map
90 }
91 #[doc = "0x18 - register description"]
92 #[inline(always)]
93 pub const fn bt_bb_nmi_map(&self) -> &BT_BB_NMI_MAP {
94 &self.bt_bb_nmi_map
95 }
96 #[doc = "0x1c - register description"]
97 #[inline(always)]
98 pub const fn lp_timer_int_map(&self) -> &LP_TIMER_INT_MAP {
99 &self.lp_timer_int_map
100 }
101 #[doc = "0x20 - register description"]
102 #[inline(always)]
103 pub const fn coex_int_map(&self) -> &COEX_INT_MAP {
104 &self.coex_int_map
105 }
106 #[doc = "0x24 - register description"]
107 #[inline(always)]
108 pub const fn ble_timer_int_map(&self) -> &BLE_TIMER_INT_MAP {
109 &self.ble_timer_int_map
110 }
111 #[doc = "0x28 - register description"]
112 #[inline(always)]
113 pub const fn ble_sec_int_map(&self) -> &BLE_SEC_INT_MAP {
114 &self.ble_sec_int_map
115 }
116 #[doc = "0x2c - register description"]
117 #[inline(always)]
118 pub const fn i2c_mst_int_map(&self) -> &I2C_MST_INT_MAP {
119 &self.i2c_mst_int_map
120 }
121 #[doc = "0x30 - register description"]
122 #[inline(always)]
123 pub const fn apb_ctrl_intr_map(&self) -> &APB_CTRL_INTR_MAP {
124 &self.apb_ctrl_intr_map
125 }
126 #[doc = "0x34 - register description"]
127 #[inline(always)]
128 pub const fn gpio_interrupt_pro_map(&self) -> &GPIO_INTERRUPT_PRO_MAP {
129 &self.gpio_interrupt_pro_map
130 }
131 #[doc = "0x38 - register description"]
132 #[inline(always)]
133 pub const fn gpio_interrupt_pro_nmi_map(&self) -> &GPIO_INTERRUPT_PRO_NMI_MAP {
134 &self.gpio_interrupt_pro_nmi_map
135 }
136 #[doc = "0x3c - register description"]
137 #[inline(always)]
138 pub const fn spi_intr_1_map(&self) -> &SPI_INTR_1_MAP {
139 &self.spi_intr_1_map
140 }
141 #[doc = "0x40 - register description"]
142 #[inline(always)]
143 pub const fn spi_intr_2_map(&self) -> &SPI_INTR_2_MAP {
144 &self.spi_intr_2_map
145 }
146 #[doc = "0x44 - register description"]
147 #[inline(always)]
148 pub const fn uart_intr_map(&self) -> &UART_INTR_MAP {
149 &self.uart_intr_map
150 }
151 #[doc = "0x48 - register description"]
152 #[inline(always)]
153 pub const fn uart1_intr_map(&self) -> &UART1_INTR_MAP {
154 &self.uart1_intr_map
155 }
156 #[doc = "0x4c - register description"]
157 #[inline(always)]
158 pub const fn ledc_int_map(&self) -> &LEDC_INT_MAP {
159 &self.ledc_int_map
160 }
161 #[doc = "0x50 - register description"]
162 #[inline(always)]
163 pub const fn efuse_int_map(&self) -> &EFUSE_INT_MAP {
164 &self.efuse_int_map
165 }
166 #[doc = "0x54 - register description"]
167 #[inline(always)]
168 pub const fn rtc_core_intr_map(&self) -> &RTC_CORE_INTR_MAP {
169 &self.rtc_core_intr_map
170 }
171 #[doc = "0x58 - register description"]
172 #[inline(always)]
173 pub const fn i2c_ext0_intr_map(&self) -> &I2C_EXT0_INTR_MAP {
174 &self.i2c_ext0_intr_map
175 }
176 #[doc = "0x5c - register description"]
177 #[inline(always)]
178 pub const fn tg_t0_int_map(&self) -> &TG_T0_INT_MAP {
179 &self.tg_t0_int_map
180 }
181 #[doc = "0x60 - register description"]
182 #[inline(always)]
183 pub const fn tg_wdt_int_map(&self) -> &TG_WDT_INT_MAP {
184 &self.tg_wdt_int_map
185 }
186 #[doc = "0x64 - register description"]
187 #[inline(always)]
188 pub const fn cache_ia_int_map(&self) -> &CACHE_IA_INT_MAP {
189 &self.cache_ia_int_map
190 }
191 #[doc = "0x68 - register description"]
192 #[inline(always)]
193 pub const fn systimer_target0_int_map(&self) -> &SYSTIMER_TARGET0_INT_MAP {
194 &self.systimer_target0_int_map
195 }
196 #[doc = "0x6c - register description"]
197 #[inline(always)]
198 pub const fn systimer_target1_int_map(&self) -> &SYSTIMER_TARGET1_INT_MAP {
199 &self.systimer_target1_int_map
200 }
201 #[doc = "0x70 - register description"]
202 #[inline(always)]
203 pub const fn systimer_target2_int_map(&self) -> &SYSTIMER_TARGET2_INT_MAP {
204 &self.systimer_target2_int_map
205 }
206 #[doc = "0x74 - register description"]
207 #[inline(always)]
208 pub const fn spi_mem_reject_intr_map(&self) -> &SPI_MEM_REJECT_INTR_MAP {
209 &self.spi_mem_reject_intr_map
210 }
211 #[doc = "0x78 - register description"]
212 #[inline(always)]
213 pub const fn icache_preload_int_map(&self) -> &ICACHE_PRELOAD_INT_MAP {
214 &self.icache_preload_int_map
215 }
216 #[doc = "0x7c - register description"]
217 #[inline(always)]
218 pub const fn icache_sync_int_map(&self) -> &ICACHE_SYNC_INT_MAP {
219 &self.icache_sync_int_map
220 }
221 #[doc = "0x80 - register description"]
222 #[inline(always)]
223 pub const fn apb_adc_int_map(&self) -> &APB_ADC_INT_MAP {
224 &self.apb_adc_int_map
225 }
226 #[doc = "0x84 - register description"]
227 #[inline(always)]
228 pub const fn dma_ch0_int_map(&self) -> &DMA_CH0_INT_MAP {
229 &self.dma_ch0_int_map
230 }
231 #[doc = "0x88 - register description"]
232 #[inline(always)]
233 pub const fn sha_int_map(&self) -> &SHA_INT_MAP {
234 &self.sha_int_map
235 }
236 #[doc = "0x8c - register description"]
237 #[inline(always)]
238 pub const fn ecc_int_map(&self) -> &ECC_INT_MAP {
239 &self.ecc_int_map
240 }
241 #[doc = "0x90 - register description"]
242 #[inline(always)]
243 pub const fn cpu_intr_from_cpu_0_map(&self) -> &CPU_INTR_FROM_CPU_0_MAP {
244 &self.cpu_intr_from_cpu_0_map
245 }
246 #[doc = "0x94 - register description"]
247 #[inline(always)]
248 pub const fn cpu_intr_from_cpu_1_map(&self) -> &CPU_INTR_FROM_CPU_1_MAP {
249 &self.cpu_intr_from_cpu_1_map
250 }
251 #[doc = "0x98 - register description"]
252 #[inline(always)]
253 pub const fn cpu_intr_from_cpu_2_map(&self) -> &CPU_INTR_FROM_CPU_2_MAP {
254 &self.cpu_intr_from_cpu_2_map
255 }
256 #[doc = "0x9c - register description"]
257 #[inline(always)]
258 pub const fn cpu_intr_from_cpu_3_map(&self) -> &CPU_INTR_FROM_CPU_3_MAP {
259 &self.cpu_intr_from_cpu_3_map
260 }
261 #[doc = "0xa0 - register description"]
262 #[inline(always)]
263 pub const fn assist_debug_intr_map(&self) -> &ASSIST_DEBUG_INTR_MAP {
264 &self.assist_debug_intr_map
265 }
266 #[doc = "0xa4 - register description"]
267 #[inline(always)]
268 pub const fn core_0_pif_pms_monitor_violate_size_intr_map(
269 &self,
270 ) -> &CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP {
271 &self.core_0_pif_pms_monitor_violate_size_intr_map
272 }
273 #[doc = "0xa8 - register description"]
274 #[inline(always)]
275 pub const fn cache_core0_acs_int_map(&self) -> &CACHE_CORE0_ACS_INT_MAP {
276 &self.cache_core0_acs_int_map
277 }
278 #[doc = "0xac - register description"]
279 #[inline(always)]
280 pub const fn intr_status_reg_0(&self) -> &INTR_STATUS_REG_0 {
281 &self.intr_status_reg_0
282 }
283 #[doc = "0xb0 - register description"]
284 #[inline(always)]
285 pub const fn intr_status_reg_1(&self) -> &INTR_STATUS_REG_1 {
286 &self.intr_status_reg_1
287 }
288 #[doc = "0xb4 - register description"]
289 #[inline(always)]
290 pub const fn clock_gate(&self) -> &CLOCK_GATE {
291 &self.clock_gate
292 }
293 #[doc = "0xb8 - register description"]
294 #[inline(always)]
295 pub const fn cpu_int_enable(&self) -> &CPU_INT_ENABLE {
296 &self.cpu_int_enable
297 }
298 #[doc = "0xbc - register description"]
299 #[inline(always)]
300 pub const fn cpu_int_type(&self) -> &CPU_INT_TYPE {
301 &self.cpu_int_type
302 }
303 #[doc = "0xc0 - register description"]
304 #[inline(always)]
305 pub const fn cpu_int_clear(&self) -> &CPU_INT_CLEAR {
306 &self.cpu_int_clear
307 }
308 #[doc = "0xc4 - register description"]
309 #[inline(always)]
310 pub const fn cpu_int_eip_status(&self) -> &CPU_INT_EIP_STATUS {
311 &self.cpu_int_eip_status
312 }
313 #[doc = "0xc8..0x148 - register description"]
314 #[inline(always)]
315 pub const fn cpu_int_pri(&self, n: usize) -> &CPU_INT_PRI {
316 &self.cpu_int_pri[n]
317 }
318 #[doc = "Iterator for array of:"]
319 #[doc = "0xc8..0x148 - register description"]
320 #[inline(always)]
321 pub fn cpu_int_pri_iter(&self) -> impl Iterator<Item = &CPU_INT_PRI> {
322 self.cpu_int_pri.iter()
323 }
324 #[doc = "0x148 - register description"]
325 #[inline(always)]
326 pub const fn cpu_int_thresh(&self) -> &CPU_INT_THRESH {
327 &self.cpu_int_thresh
328 }
329 #[doc = "0x7fc - register description"]
330 #[inline(always)]
331 pub const fn interrupt_reg_date(&self) -> &INTERRUPT_REG_DATE {
332 &self.interrupt_reg_date
333 }
334}
335#[doc = "MAC_INTR_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_map`] module"]
336pub type MAC_INTR_MAP = crate::Reg<mac_intr_map::MAC_INTR_MAP_SPEC>;
337#[doc = "register description"]
338pub mod mac_intr_map;
339#[doc = "WIFI_MAC_NMI_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_mac_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_mac_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_mac_nmi_map`] module"]
340pub type WIFI_MAC_NMI_MAP = crate::Reg<wifi_mac_nmi_map::WIFI_MAC_NMI_MAP_SPEC>;
341#[doc = "register description"]
342pub mod wifi_mac_nmi_map;
343#[doc = "WIFI_PWR_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_pwr_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_pwr_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_pwr_int_map`] module"]
344pub type WIFI_PWR_INT_MAP = crate::Reg<wifi_pwr_int_map::WIFI_PWR_INT_MAP_SPEC>;
345#[doc = "register description"]
346pub mod wifi_pwr_int_map;
347#[doc = "WIFI_BB_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_bb_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_bb_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_bb_int_map`] module"]
348pub type WIFI_BB_INT_MAP = crate::Reg<wifi_bb_int_map::WIFI_BB_INT_MAP_SPEC>;
349#[doc = "register description"]
350pub mod wifi_bb_int_map;
351#[doc = "BT_MAC_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`bt_mac_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bt_mac_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bt_mac_int_map`] module"]
352pub type BT_MAC_INT_MAP = crate::Reg<bt_mac_int_map::BT_MAC_INT_MAP_SPEC>;
353#[doc = "register description"]
354pub mod bt_mac_int_map;
355#[doc = "BT_BB_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`bt_bb_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bt_bb_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bt_bb_int_map`] module"]
356pub type BT_BB_INT_MAP = crate::Reg<bt_bb_int_map::BT_BB_INT_MAP_SPEC>;
357#[doc = "register description"]
358pub mod bt_bb_int_map;
359#[doc = "BT_BB_NMI_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`bt_bb_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bt_bb_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bt_bb_nmi_map`] module"]
360pub type BT_BB_NMI_MAP = crate::Reg<bt_bb_nmi_map::BT_BB_NMI_MAP_SPEC>;
361#[doc = "register description"]
362pub mod bt_bb_nmi_map;
363#[doc = "LP_TIMER_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`lp_timer_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lp_timer_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lp_timer_int_map`] module"]
364pub type LP_TIMER_INT_MAP = crate::Reg<lp_timer_int_map::LP_TIMER_INT_MAP_SPEC>;
365#[doc = "register description"]
366pub mod lp_timer_int_map;
367#[doc = "COEX_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`coex_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`coex_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@coex_int_map`] module"]
368pub type COEX_INT_MAP = crate::Reg<coex_int_map::COEX_INT_MAP_SPEC>;
369#[doc = "register description"]
370pub mod coex_int_map;
371#[doc = "BLE_TIMER_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`ble_timer_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ble_timer_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ble_timer_int_map`] module"]
372pub type BLE_TIMER_INT_MAP = crate::Reg<ble_timer_int_map::BLE_TIMER_INT_MAP_SPEC>;
373#[doc = "register description"]
374pub mod ble_timer_int_map;
375#[doc = "BLE_SEC_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`ble_sec_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ble_sec_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ble_sec_int_map`] module"]
376pub type BLE_SEC_INT_MAP = crate::Reg<ble_sec_int_map::BLE_SEC_INT_MAP_SPEC>;
377#[doc = "register description"]
378pub mod ble_sec_int_map;
379#[doc = "I2C_MST_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c_mst_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c_mst_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c_mst_int_map`] module"]
380pub type I2C_MST_INT_MAP = crate::Reg<i2c_mst_int_map::I2C_MST_INT_MAP_SPEC>;
381#[doc = "register description"]
382pub mod i2c_mst_int_map;
383#[doc = "APB_CTRL_INTR_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_ctrl_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_ctrl_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_ctrl_intr_map`] module"]
384pub type APB_CTRL_INTR_MAP = crate::Reg<apb_ctrl_intr_map::APB_CTRL_INTR_MAP_SPEC>;
385#[doc = "register description"]
386pub mod apb_ctrl_intr_map;
387#[doc = "GPIO_INTERRUPT_PRO_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`gpio_interrupt_pro_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpio_interrupt_pro_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_interrupt_pro_map`] module"]
388pub type GPIO_INTERRUPT_PRO_MAP = crate::Reg<gpio_interrupt_pro_map::GPIO_INTERRUPT_PRO_MAP_SPEC>;
389#[doc = "register description"]
390pub mod gpio_interrupt_pro_map;
391#[doc = "GPIO_INTERRUPT_PRO_NMI_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`gpio_interrupt_pro_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpio_interrupt_pro_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_interrupt_pro_nmi_map`] module"]
392pub type GPIO_INTERRUPT_PRO_NMI_MAP =
393 crate::Reg<gpio_interrupt_pro_nmi_map::GPIO_INTERRUPT_PRO_NMI_MAP_SPEC>;
394#[doc = "register description"]
395pub mod gpio_interrupt_pro_nmi_map;
396#[doc = "SPI_INTR_1_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_intr_1_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_intr_1_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_intr_1_map`] module"]
397pub type SPI_INTR_1_MAP = crate::Reg<spi_intr_1_map::SPI_INTR_1_MAP_SPEC>;
398#[doc = "register description"]
399pub mod spi_intr_1_map;
400#[doc = "SPI_INTR_2_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_intr_2_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_intr_2_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_intr_2_map`] module"]
401pub type SPI_INTR_2_MAP = crate::Reg<spi_intr_2_map::SPI_INTR_2_MAP_SPEC>;
402#[doc = "register description"]
403pub mod spi_intr_2_map;
404#[doc = "UART_INTR_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`uart_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uart_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uart_intr_map`] module"]
405pub type UART_INTR_MAP = crate::Reg<uart_intr_map::UART_INTR_MAP_SPEC>;
406#[doc = "register description"]
407pub mod uart_intr_map;
408#[doc = "UART1_INTR_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`uart1_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uart1_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uart1_intr_map`] module"]
409pub type UART1_INTR_MAP = crate::Reg<uart1_intr_map::UART1_INTR_MAP_SPEC>;
410#[doc = "register description"]
411pub mod uart1_intr_map;
412#[doc = "LEDC_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`ledc_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ledc_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ledc_int_map`] module"]
413pub type LEDC_INT_MAP = crate::Reg<ledc_int_map::LEDC_INT_MAP_SPEC>;
414#[doc = "register description"]
415pub mod ledc_int_map;
416#[doc = "EFUSE_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`efuse_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efuse_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@efuse_int_map`] module"]
417pub type EFUSE_INT_MAP = crate::Reg<efuse_int_map::EFUSE_INT_MAP_SPEC>;
418#[doc = "register description"]
419pub mod efuse_int_map;
420#[doc = "RTC_CORE_INTR_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`rtc_core_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rtc_core_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rtc_core_intr_map`] module"]
421pub type RTC_CORE_INTR_MAP = crate::Reg<rtc_core_intr_map::RTC_CORE_INTR_MAP_SPEC>;
422#[doc = "register description"]
423pub mod rtc_core_intr_map;
424#[doc = "I2C_EXT0_INTR_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c_ext0_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c_ext0_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c_ext0_intr_map`] module"]
425pub type I2C_EXT0_INTR_MAP = crate::Reg<i2c_ext0_intr_map::I2C_EXT0_INTR_MAP_SPEC>;
426#[doc = "register description"]
427pub mod i2c_ext0_intr_map;
428#[doc = "TG_T0_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`tg_t0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg_t0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg_t0_int_map`] module"]
429pub type TG_T0_INT_MAP = crate::Reg<tg_t0_int_map::TG_T0_INT_MAP_SPEC>;
430#[doc = "register description"]
431pub mod tg_t0_int_map;
432#[doc = "TG_WDT_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`tg_wdt_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg_wdt_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg_wdt_int_map`] module"]
433pub type TG_WDT_INT_MAP = crate::Reg<tg_wdt_int_map::TG_WDT_INT_MAP_SPEC>;
434#[doc = "register description"]
435pub mod tg_wdt_int_map;
436#[doc = "CACHE_IA_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_ia_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_ia_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_ia_int_map`] module"]
437pub type CACHE_IA_INT_MAP = crate::Reg<cache_ia_int_map::CACHE_IA_INT_MAP_SPEC>;
438#[doc = "register description"]
439pub mod cache_ia_int_map;
440#[doc = "SYSTIMER_TARGET0_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_target0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_target0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_target0_int_map`] module"]
441pub type SYSTIMER_TARGET0_INT_MAP =
442 crate::Reg<systimer_target0_int_map::SYSTIMER_TARGET0_INT_MAP_SPEC>;
443#[doc = "register description"]
444pub mod systimer_target0_int_map;
445#[doc = "SYSTIMER_TARGET1_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_target1_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_target1_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_target1_int_map`] module"]
446pub type SYSTIMER_TARGET1_INT_MAP =
447 crate::Reg<systimer_target1_int_map::SYSTIMER_TARGET1_INT_MAP_SPEC>;
448#[doc = "register description"]
449pub mod systimer_target1_int_map;
450#[doc = "SYSTIMER_TARGET2_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_target2_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_target2_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_target2_int_map`] module"]
451pub type SYSTIMER_TARGET2_INT_MAP =
452 crate::Reg<systimer_target2_int_map::SYSTIMER_TARGET2_INT_MAP_SPEC>;
453#[doc = "register description"]
454pub mod systimer_target2_int_map;
455#[doc = "SPI_MEM_REJECT_INTR_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_mem_reject_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_mem_reject_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_mem_reject_intr_map`] module"]
456pub type SPI_MEM_REJECT_INTR_MAP =
457 crate::Reg<spi_mem_reject_intr_map::SPI_MEM_REJECT_INTR_MAP_SPEC>;
458#[doc = "register description"]
459pub mod spi_mem_reject_intr_map;
460#[doc = "ICACHE_PRELOAD_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_preload_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_preload_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_preload_int_map`] module"]
461pub type ICACHE_PRELOAD_INT_MAP = crate::Reg<icache_preload_int_map::ICACHE_PRELOAD_INT_MAP_SPEC>;
462#[doc = "register description"]
463pub mod icache_preload_int_map;
464#[doc = "ICACHE_SYNC_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_sync_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_sync_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_sync_int_map`] module"]
465pub type ICACHE_SYNC_INT_MAP = crate::Reg<icache_sync_int_map::ICACHE_SYNC_INT_MAP_SPEC>;
466#[doc = "register description"]
467pub mod icache_sync_int_map;
468#[doc = "APB_ADC_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_adc_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_adc_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_adc_int_map`] module"]
469pub type APB_ADC_INT_MAP = crate::Reg<apb_adc_int_map::APB_ADC_INT_MAP_SPEC>;
470#[doc = "register description"]
471pub mod apb_adc_int_map;
472#[doc = "DMA_CH0_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_ch0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_ch0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_ch0_int_map`] module"]
473pub type DMA_CH0_INT_MAP = crate::Reg<dma_ch0_int_map::DMA_CH0_INT_MAP_SPEC>;
474#[doc = "register description"]
475pub mod dma_ch0_int_map;
476#[doc = "SHA_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`sha_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sha_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sha_int_map`] module"]
477pub type SHA_INT_MAP = crate::Reg<sha_int_map::SHA_INT_MAP_SPEC>;
478#[doc = "register description"]
479pub mod sha_int_map;
480#[doc = "ECC_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`ecc_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ecc_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecc_int_map`] module"]
481pub type ECC_INT_MAP = crate::Reg<ecc_int_map::ECC_INT_MAP_SPEC>;
482#[doc = "register description"]
483pub mod ecc_int_map;
484#[doc = "CPU_INTR_FROM_CPU_0_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_0_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_0_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_0_map`] module"]
485pub type CPU_INTR_FROM_CPU_0_MAP =
486 crate::Reg<cpu_intr_from_cpu_0_map::CPU_INTR_FROM_CPU_0_MAP_SPEC>;
487#[doc = "register description"]
488pub mod cpu_intr_from_cpu_0_map;
489#[doc = "CPU_INTR_FROM_CPU_1_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_1_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_1_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_1_map`] module"]
490pub type CPU_INTR_FROM_CPU_1_MAP =
491 crate::Reg<cpu_intr_from_cpu_1_map::CPU_INTR_FROM_CPU_1_MAP_SPEC>;
492#[doc = "register description"]
493pub mod cpu_intr_from_cpu_1_map;
494#[doc = "CPU_INTR_FROM_CPU_2_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_2_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_2_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_2_map`] module"]
495pub type CPU_INTR_FROM_CPU_2_MAP =
496 crate::Reg<cpu_intr_from_cpu_2_map::CPU_INTR_FROM_CPU_2_MAP_SPEC>;
497#[doc = "register description"]
498pub mod cpu_intr_from_cpu_2_map;
499#[doc = "CPU_INTR_FROM_CPU_3_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_3_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_3_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_3_map`] module"]
500pub type CPU_INTR_FROM_CPU_3_MAP =
501 crate::Reg<cpu_intr_from_cpu_3_map::CPU_INTR_FROM_CPU_3_MAP_SPEC>;
502#[doc = "register description"]
503pub mod cpu_intr_from_cpu_3_map;
504#[doc = "ASSIST_DEBUG_INTR_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`assist_debug_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`assist_debug_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@assist_debug_intr_map`] module"]
505pub type ASSIST_DEBUG_INTR_MAP = crate::Reg<assist_debug_intr_map::ASSIST_DEBUG_INTR_MAP_SPEC>;
506#[doc = "register description"]
507pub mod assist_debug_intr_map;
508#[doc = "CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_pif_pms_monitor_violate_size_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_pif_pms_monitor_violate_size_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_pif_pms_monitor_violate_size_intr_map`] module"]
509pub type CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP = crate::Reg<
510 core_0_pif_pms_monitor_violate_size_intr_map::CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_SPEC,
511>;
512#[doc = "register description"]
513pub mod core_0_pif_pms_monitor_violate_size_intr_map;
514#[doc = "CACHE_CORE0_ACS_INT_MAP (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_core0_acs_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_core0_acs_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_core0_acs_int_map`] module"]
515pub type CACHE_CORE0_ACS_INT_MAP =
516 crate::Reg<cache_core0_acs_int_map::CACHE_CORE0_ACS_INT_MAP_SPEC>;
517#[doc = "register description"]
518pub mod cache_core0_acs_int_map;
519#[doc = "INTR_STATUS_REG_0 (r) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`intr_status_reg_0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intr_status_reg_0`] module"]
520pub type INTR_STATUS_REG_0 = crate::Reg<intr_status_reg_0::INTR_STATUS_REG_0_SPEC>;
521#[doc = "register description"]
522pub mod intr_status_reg_0;
523#[doc = "INTR_STATUS_REG_1 (r) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`intr_status_reg_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intr_status_reg_1`] module"]
524pub type INTR_STATUS_REG_1 = crate::Reg<intr_status_reg_1::INTR_STATUS_REG_1_SPEC>;
525#[doc = "register description"]
526pub mod intr_status_reg_1;
527#[doc = "CLOCK_GATE (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`clock_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
528pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
529#[doc = "register description"]
530pub mod clock_gate;
531#[doc = "CPU_INT_ENABLE (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_int_enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_enable`] module"]
532pub type CPU_INT_ENABLE = crate::Reg<cpu_int_enable::CPU_INT_ENABLE_SPEC>;
533#[doc = "register description"]
534pub mod cpu_int_enable;
535#[doc = "CPU_INT_TYPE (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_type::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_int_type::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_type`] module"]
536pub type CPU_INT_TYPE = crate::Reg<cpu_int_type::CPU_INT_TYPE_SPEC>;
537#[doc = "register description"]
538pub mod cpu_int_type;
539#[doc = "CPU_INT_CLEAR (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_clear::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_int_clear::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_clear`] module"]
540pub type CPU_INT_CLEAR = crate::Reg<cpu_int_clear::CPU_INT_CLEAR_SPEC>;
541#[doc = "register description"]
542pub mod cpu_int_clear;
543#[doc = "CPU_INT_EIP_STATUS (r) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_eip_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_eip_status`] module"]
544pub type CPU_INT_EIP_STATUS = crate::Reg<cpu_int_eip_status::CPU_INT_EIP_STATUS_SPEC>;
545#[doc = "register description"]
546pub mod cpu_int_eip_status;
547#[doc = "CPU_INT_PRI (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_pri::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_int_pri::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_pri`] module"]
548pub type CPU_INT_PRI = crate::Reg<cpu_int_pri::CPU_INT_PRI_SPEC>;
549#[doc = "register description"]
550pub mod cpu_int_pri;
551#[doc = "CPU_INT_THRESH (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_thresh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_int_thresh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_thresh`] module"]
552pub type CPU_INT_THRESH = crate::Reg<cpu_int_thresh::CPU_INT_THRESH_SPEC>;
553#[doc = "register description"]
554pub mod cpu_int_thresh;
555#[doc = "INTERRUPT_REG_DATE (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`interrupt_reg_date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`interrupt_reg_date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_reg_date`] module"]
556pub type INTERRUPT_REG_DATE = crate::Reg<interrupt_reg_date::INTERRUPT_REG_DATE_SPEC>;
557#[doc = "register description"]
558pub mod interrupt_reg_date;