esp32c2/dma/int_ch/
clr.rs

1#[doc = "Register `CLR` writer"]
2pub type W = crate::W<CLR_SPEC>;
3#[doc = "Field `IN_DONE` writer - Set this bit to clear the IN_DONE_CH_INT interrupt."]
4pub type IN_DONE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
5#[doc = "Field `IN_SUC_EOF` writer - Set this bit to clear the IN_SUC_EOF_CH_INT interrupt."]
6pub type IN_SUC_EOF_W<'a, REG> = crate::BitWriter1C<'a, REG>;
7#[doc = "Field `IN_ERR_EOF` writer - Set this bit to clear the IN_ERR_EOF_CH_INT interrupt."]
8pub type IN_ERR_EOF_W<'a, REG> = crate::BitWriter1C<'a, REG>;
9#[doc = "Field `OUT_DONE` writer - Set this bit to clear the OUT_DONE_CH_INT interrupt."]
10pub type OUT_DONE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
11#[doc = "Field `OUT_EOF` writer - Set this bit to clear the OUT_EOF_CH_INT interrupt."]
12pub type OUT_EOF_W<'a, REG> = crate::BitWriter1C<'a, REG>;
13#[doc = "Field `IN_DSCR_ERR` writer - Set this bit to clear the IN_DSCR_ERR_CH_INT interrupt."]
14pub type IN_DSCR_ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
15#[doc = "Field `OUT_DSCR_ERR` writer - Set this bit to clear the OUT_DSCR_ERR_CH_INT interrupt."]
16pub type OUT_DSCR_ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
17#[doc = "Field `IN_DSCR_EMPTY` writer - Set this bit to clear the IN_DSCR_EMPTY_CH_INT interrupt."]
18pub type IN_DSCR_EMPTY_W<'a, REG> = crate::BitWriter1C<'a, REG>;
19#[doc = "Field `OUT_TOTAL_EOF` writer - Set this bit to clear the OUT_TOTAL_EOF_CH_INT interrupt."]
20pub type OUT_TOTAL_EOF_W<'a, REG> = crate::BitWriter1C<'a, REG>;
21#[doc = "Field `INFIFO_OVF` writer - Set this bit to clear the INFIFO_OVF_L1_CH_INT interrupt."]
22pub type INFIFO_OVF_W<'a, REG> = crate::BitWriter1C<'a, REG>;
23#[doc = "Field `INFIFO_UDF` writer - Set this bit to clear the INFIFO_UDF_L1_CH_INT interrupt."]
24pub type INFIFO_UDF_W<'a, REG> = crate::BitWriter1C<'a, REG>;
25#[doc = "Field `OUTFIFO_OVF` writer - Set this bit to clear the OUTFIFO_OVF_L1_CH_INT interrupt."]
26pub type OUTFIFO_OVF_W<'a, REG> = crate::BitWriter1C<'a, REG>;
27#[doc = "Field `OUTFIFO_UDF` writer - Set this bit to clear the OUTFIFO_UDF_L1_CH_INT interrupt."]
28pub type OUTFIFO_UDF_W<'a, REG> = crate::BitWriter1C<'a, REG>;
29#[cfg(feature = "impl-register-debug")]
30impl core::fmt::Debug for crate::generic::Reg<CLR_SPEC> {
31    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
32        write!(f, "(not readable)")
33    }
34}
35impl W {
36    #[doc = "Bit 0 - Set this bit to clear the IN_DONE_CH_INT interrupt."]
37    #[inline(always)]
38    pub fn in_done(&mut self) -> IN_DONE_W<CLR_SPEC> {
39        IN_DONE_W::new(self, 0)
40    }
41    #[doc = "Bit 1 - Set this bit to clear the IN_SUC_EOF_CH_INT interrupt."]
42    #[inline(always)]
43    pub fn in_suc_eof(&mut self) -> IN_SUC_EOF_W<CLR_SPEC> {
44        IN_SUC_EOF_W::new(self, 1)
45    }
46    #[doc = "Bit 2 - Set this bit to clear the IN_ERR_EOF_CH_INT interrupt."]
47    #[inline(always)]
48    pub fn in_err_eof(&mut self) -> IN_ERR_EOF_W<CLR_SPEC> {
49        IN_ERR_EOF_W::new(self, 2)
50    }
51    #[doc = "Bit 3 - Set this bit to clear the OUT_DONE_CH_INT interrupt."]
52    #[inline(always)]
53    pub fn out_done(&mut self) -> OUT_DONE_W<CLR_SPEC> {
54        OUT_DONE_W::new(self, 3)
55    }
56    #[doc = "Bit 4 - Set this bit to clear the OUT_EOF_CH_INT interrupt."]
57    #[inline(always)]
58    pub fn out_eof(&mut self) -> OUT_EOF_W<CLR_SPEC> {
59        OUT_EOF_W::new(self, 4)
60    }
61    #[doc = "Bit 5 - Set this bit to clear the IN_DSCR_ERR_CH_INT interrupt."]
62    #[inline(always)]
63    pub fn in_dscr_err(&mut self) -> IN_DSCR_ERR_W<CLR_SPEC> {
64        IN_DSCR_ERR_W::new(self, 5)
65    }
66    #[doc = "Bit 6 - Set this bit to clear the OUT_DSCR_ERR_CH_INT interrupt."]
67    #[inline(always)]
68    pub fn out_dscr_err(&mut self) -> OUT_DSCR_ERR_W<CLR_SPEC> {
69        OUT_DSCR_ERR_W::new(self, 6)
70    }
71    #[doc = "Bit 7 - Set this bit to clear the IN_DSCR_EMPTY_CH_INT interrupt."]
72    #[inline(always)]
73    pub fn in_dscr_empty(&mut self) -> IN_DSCR_EMPTY_W<CLR_SPEC> {
74        IN_DSCR_EMPTY_W::new(self, 7)
75    }
76    #[doc = "Bit 8 - Set this bit to clear the OUT_TOTAL_EOF_CH_INT interrupt."]
77    #[inline(always)]
78    pub fn out_total_eof(&mut self) -> OUT_TOTAL_EOF_W<CLR_SPEC> {
79        OUT_TOTAL_EOF_W::new(self, 8)
80    }
81    #[doc = "Bit 9 - Set this bit to clear the INFIFO_OVF_L1_CH_INT interrupt."]
82    #[inline(always)]
83    pub fn infifo_ovf(&mut self) -> INFIFO_OVF_W<CLR_SPEC> {
84        INFIFO_OVF_W::new(self, 9)
85    }
86    #[doc = "Bit 10 - Set this bit to clear the INFIFO_UDF_L1_CH_INT interrupt."]
87    #[inline(always)]
88    pub fn infifo_udf(&mut self) -> INFIFO_UDF_W<CLR_SPEC> {
89        INFIFO_UDF_W::new(self, 10)
90    }
91    #[doc = "Bit 11 - Set this bit to clear the OUTFIFO_OVF_L1_CH_INT interrupt."]
92    #[inline(always)]
93    pub fn outfifo_ovf(&mut self) -> OUTFIFO_OVF_W<CLR_SPEC> {
94        OUTFIFO_OVF_W::new(self, 11)
95    }
96    #[doc = "Bit 12 - Set this bit to clear the OUTFIFO_UDF_L1_CH_INT interrupt."]
97    #[inline(always)]
98    pub fn outfifo_udf(&mut self) -> OUTFIFO_UDF_W<CLR_SPEC> {
99        OUTFIFO_UDF_W::new(self, 12)
100    }
101}
102#[doc = "DMA_INT_CLR_CH0_REG.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
103pub struct CLR_SPEC;
104impl crate::RegisterSpec for CLR_SPEC {
105    type Ux = u32;
106}
107#[doc = "`write(|w| ..)` method takes [`clr::W`](W) writer structure"]
108impl crate::Writable for CLR_SPEC {
109    type Safety = crate::Unsafe;
110    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
111    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x1fff;
112}
113#[doc = "`reset()` method sets CLR to value 0"]
114impl crate::Resettable for CLR_SPEC {
115    const RESET_VALUE: u32 = 0;
116}
esp32c2/dma/int_ch/clr.rs

esp32c2/dma/int_ch/
clr.rs
