Module sus_status

SPI1 flash suspend status register

Structs

SUS_STATUS_SPEC

SPI1 flash suspend status register

Type Aliases

FLASH_DP_DLY_128_R

Field FLASH_DP_DLY_128 reader - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after DP command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after DP command is sent.

FLASH_DP_DLY_128_W

Field FLASH_DP_DLY_128 writer - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after DP command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after DP command is sent.

FLASH_HPM_DLY_128_R

Field FLASH_HPM_DLY_128 reader - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after HPM command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after HPM command is sent.

FLASH_HPM_DLY_128_W

Field FLASH_HPM_DLY_128 writer - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after HPM command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after HPM command is sent.

FLASH_PER_DLY_128_R

Field FLASH_PER_DLY_128 reader - Valid when SPI_MEM_FLASH_PER_WAIT_EN is 1. 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after PER command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after PER command is sent.

FLASH_PER_DLY_128_W

Field FLASH_PER_DLY_128 writer - Valid when SPI_MEM_FLASH_PER_WAIT_EN is 1. 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after PER command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after PER command is sent.

FLASH_PES_DLY_128_R

Field FLASH_PES_DLY_128 reader - Valid when SPI_MEM_FLASH_PES_WAIT_EN is 1. 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after PES command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after PES command is sent.

FLASH_PES_DLY_128_W

Field FLASH_PES_DLY_128 writer - Valid when SPI_MEM_FLASH_PES_WAIT_EN is 1. 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after PES command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after PES command is sent.

FLASH_RES_DLY_128_R

Field FLASH_RES_DLY_128 reader - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after RES command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after RES command is sent.

FLASH_RES_DLY_128_W

Field FLASH_RES_DLY_128 writer - 1: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 128) SPI_CLK cycles after RES command is sent. 0: SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4) SPI_CLK cycles after RES command is sent.

FLASH_SUS_R

Field FLASH_SUS reader - The status of flash suspend, only used in SPI1.

FLASH_SUS_W

Field FLASH_SUS writer - The status of flash suspend, only used in SPI1.

R

Register SUS_STATUS reader

SPI0_LOCK_EN_R

Field SPI0_LOCK_EN reader - 1: Enable SPI0 lock SPI0/1 arbiter option. 0: Disable it.

SPI0_LOCK_EN_W

Field SPI0_LOCK_EN writer - 1: Enable SPI0 lock SPI0/1 arbiter option. 0: Disable it.

W

Register SUS_STATUS writer

WAIT_PESR_CMD_2B_R

Field WAIT_PESR_CMD_2B reader - 1: SPI1 sends out SPI_MEM_WAIT_PESR_COMMAND[15:0] to check SUS/SUS1/SUS2 bit. 0: SPI1 sends out SPI_MEM_WAIT_PESR_COMMAND[7:0] to check SUS/SUS1/SUS2 bit.

WAIT_PESR_CMD_2B_W

Field WAIT_PESR_CMD_2B writer - 1: SPI1 sends out SPI_MEM_WAIT_PESR_COMMAND[15:0] to check SUS/SUS1/SUS2 bit. 0: SPI1 sends out SPI_MEM_WAIT_PESR_COMMAND[7:0] to check SUS/SUS1/SUS2 bit.