Expand description
Peripheral access API for ESP32-C2 microcontrollers (generated using svd2rust v0.28.0 ( ))
You can find an overview of the generated API here.
API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Re-exports
pub use self::uart0 as uart1;Modules
Advanced Peripheral Bus Controller
Successive Approximation Register Analog to Digital Converter
Debug Assist
DMA (Direct Memory Access) Controller
ECC (ECC Hardware Accelerator)
eFuse Controller
External Memory
Common register and bit access and modify traits
General Purpose Input/Output
I2C (Inter-Integrated Circuit) Controller
Interrupt Core
Input/Output Multiplexer
LED PWM (Pulse Width Modulation) Controller
Hardware random number generator
Real Time Controller
Sensitive
SHA (Secure Hash Algorithm) Accelerator
SPI (Serial Peripheral Interface) Controller
SPI (Serial Peripheral Interface) Controller
SPI (Serial Peripheral Interface) Controller
System
System Timer
Timer Group
UART (Universal Asynchronous Receiver-Transmitter) Controller
XTS-AES-128 Flash Encryption
Structs
Advanced Peripheral Bus Controller
Successive Approximation Register Analog to Digital Converter
Debug Assist
DMA (Direct Memory Access) Controller
ECC (ECC Hardware Accelerator)
eFuse Controller
External Memory
General Purpose Input/Output
I2C (Inter-Integrated Circuit) Controller
Interrupt Core
Input/Output Multiplexer
LED PWM (Pulse Width Modulation) Controller
All the peripherals.
Hardware random number generator
Real Time Controller
Sensitive
SHA (Secure Hash Algorithm) Accelerator
SPI (Serial Peripheral Interface) Controller
SPI (Serial Peripheral Interface) Controller
SPI (Serial Peripheral Interface) Controller
System
System Timer
Timer Group
UART (Universal Asynchronous Receiver-Transmitter) Controller
UART (Universal Asynchronous Receiver-Transmitter) Controller
XTS-AES-128 Flash Encryption
Enums
Enumeration of all the interrupts.
Constants
Number available in the NVIC for configuring priority