esp32c2/modem_clkrst/
ble_timer_clk_conf.rs

1#[doc = "Register `BLE_TIMER_CLK_CONF` reader"]
2pub type R = crate::R<BLE_TIMER_CLK_CONF_SPEC>;
3#[doc = "Register `BLE_TIMER_CLK_CONF` writer"]
4pub type W = crate::W<BLE_TIMER_CLK_CONF_SPEC>;
5#[doc = "Field `BLETIMER_USE_XTAL` reader - ."]
6pub type BLETIMER_USE_XTAL_R = crate::BitReader;
7#[doc = "Field `BLETIMER_USE_XTAL` writer - ."]
8pub type BLETIMER_USE_XTAL_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `BLETIMER_CLK_IS_ACTIVE` reader - ."]
10pub type BLETIMER_CLK_IS_ACTIVE_R = crate::BitReader;
11#[doc = "Field `BLETIMER_CLK_IS_ACTIVE` writer - ."]
12pub type BLETIMER_CLK_IS_ACTIVE_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bit 0 - ."]
15    #[inline(always)]
16    pub fn bletimer_use_xtal(&self) -> BLETIMER_USE_XTAL_R {
17        BLETIMER_USE_XTAL_R::new((self.bits & 1) != 0)
18    }
19    #[doc = "Bit 1 - ."]
20    #[inline(always)]
21    pub fn bletimer_clk_is_active(&self) -> BLETIMER_CLK_IS_ACTIVE_R {
22        BLETIMER_CLK_IS_ACTIVE_R::new(((self.bits >> 1) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("BLE_TIMER_CLK_CONF")
29            .field("bletimer_use_xtal", &self.bletimer_use_xtal())
30            .field("bletimer_clk_is_active", &self.bletimer_clk_is_active())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bit 0 - ."]
36    #[inline(always)]
37    pub fn bletimer_use_xtal(&mut self) -> BLETIMER_USE_XTAL_W<BLE_TIMER_CLK_CONF_SPEC> {
38        BLETIMER_USE_XTAL_W::new(self, 0)
39    }
40    #[doc = "Bit 1 - ."]
41    #[inline(always)]
42    pub fn bletimer_clk_is_active(&mut self) -> BLETIMER_CLK_IS_ACTIVE_W<BLE_TIMER_CLK_CONF_SPEC> {
43        BLETIMER_CLK_IS_ACTIVE_W::new(self, 1)
44    }
45}
46#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`ble_timer_clk_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ble_timer_clk_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
47pub struct BLE_TIMER_CLK_CONF_SPEC;
48impl crate::RegisterSpec for BLE_TIMER_CLK_CONF_SPEC {
49    type Ux = u32;
50}
51#[doc = "`read()` method returns [`ble_timer_clk_conf::R`](R) reader structure"]
52impl crate::Readable for BLE_TIMER_CLK_CONF_SPEC {}
53#[doc = "`write(|w| ..)` method takes [`ble_timer_clk_conf::W`](W) writer structure"]
54impl crate::Writable for BLE_TIMER_CLK_CONF_SPEC {
55    type Safety = crate::Unsafe;
56}
57#[doc = "`reset()` method sets BLE_TIMER_CLK_CONF to value 0x03"]
58impl crate::Resettable for BLE_TIMER_CLK_CONF_SPEC {
59    const RESET_VALUE: u32 = 0x03;
60}
esp32c2/modem_clkrst/ble_timer_clk_conf.rs

esp32c2/modem_clkrst/
ble_timer_clk_conf.rs
