esp32c2/
sensitive.rs

1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    rom_table_lock: ROM_TABLE_LOCK,
6    rom_table: ROM_TABLE,
7    apb_peripheral_access_0: APB_PERIPHERAL_ACCESS_0,
8    apb_peripheral_access_1: APB_PERIPHERAL_ACCESS_1,
9    internal_sram_usage_0: INTERNAL_SRAM_USAGE_0,
10    internal_sram_usage_1: INTERNAL_SRAM_USAGE_1,
11    internal_sram_usage_3: INTERNAL_SRAM_USAGE_3,
12    cache_tag_access_0: CACHE_TAG_ACCESS_0,
13    cache_tag_access_1: CACHE_TAG_ACCESS_1,
14    cache_mmu_access_0: CACHE_MMU_ACCESS_0,
15    cache_mmu_access_1: CACHE_MMU_ACCESS_1,
16    pif_access_monitor_0: PIF_ACCESS_MONITOR_0,
17    pif_access_monitor_1: PIF_ACCESS_MONITOR_1,
18    pif_access_monitor_2: PIF_ACCESS_MONITOR_2,
19    pif_access_monitor_3: PIF_ACCESS_MONITOR_3,
20    xts_aes_key_update: XTS_AES_KEY_UPDATE,
21    clock_gate: CLOCK_GATE,
22    _reserved17: [u8; 0x0fb8],
23    sensitive_reg_date: SENSITIVE_REG_DATE,
24}
25impl RegisterBlock {
26    #[doc = "0x00 - register description"]
27    #[inline(always)]
28    pub const fn rom_table_lock(&self) -> &ROM_TABLE_LOCK {
29        &self.rom_table_lock
30    }
31    #[doc = "0x04 - register description"]
32    #[inline(always)]
33    pub const fn rom_table(&self) -> &ROM_TABLE {
34        &self.rom_table
35    }
36    #[doc = "0x08 - register description"]
37    #[inline(always)]
38    pub const fn apb_peripheral_access_0(&self) -> &APB_PERIPHERAL_ACCESS_0 {
39        &self.apb_peripheral_access_0
40    }
41    #[doc = "0x0c - register description"]
42    #[inline(always)]
43    pub const fn apb_peripheral_access_1(&self) -> &APB_PERIPHERAL_ACCESS_1 {
44        &self.apb_peripheral_access_1
45    }
46    #[doc = "0x10 - register description"]
47    #[inline(always)]
48    pub const fn internal_sram_usage_0(&self) -> &INTERNAL_SRAM_USAGE_0 {
49        &self.internal_sram_usage_0
50    }
51    #[doc = "0x14 - register description"]
52    #[inline(always)]
53    pub const fn internal_sram_usage_1(&self) -> &INTERNAL_SRAM_USAGE_1 {
54        &self.internal_sram_usage_1
55    }
56    #[doc = "0x18 - register description"]
57    #[inline(always)]
58    pub const fn internal_sram_usage_3(&self) -> &INTERNAL_SRAM_USAGE_3 {
59        &self.internal_sram_usage_3
60    }
61    #[doc = "0x1c - register description"]
62    #[inline(always)]
63    pub const fn cache_tag_access_0(&self) -> &CACHE_TAG_ACCESS_0 {
64        &self.cache_tag_access_0
65    }
66    #[doc = "0x20 - register description"]
67    #[inline(always)]
68    pub const fn cache_tag_access_1(&self) -> &CACHE_TAG_ACCESS_1 {
69        &self.cache_tag_access_1
70    }
71    #[doc = "0x24 - register description"]
72    #[inline(always)]
73    pub const fn cache_mmu_access_0(&self) -> &CACHE_MMU_ACCESS_0 {
74        &self.cache_mmu_access_0
75    }
76    #[doc = "0x28 - register description"]
77    #[inline(always)]
78    pub const fn cache_mmu_access_1(&self) -> &CACHE_MMU_ACCESS_1 {
79        &self.cache_mmu_access_1
80    }
81    #[doc = "0x2c - register description"]
82    #[inline(always)]
83    pub const fn pif_access_monitor_0(&self) -> &PIF_ACCESS_MONITOR_0 {
84        &self.pif_access_monitor_0
85    }
86    #[doc = "0x30 - register description"]
87    #[inline(always)]
88    pub const fn pif_access_monitor_1(&self) -> &PIF_ACCESS_MONITOR_1 {
89        &self.pif_access_monitor_1
90    }
91    #[doc = "0x34 - register description"]
92    #[inline(always)]
93    pub const fn pif_access_monitor_2(&self) -> &PIF_ACCESS_MONITOR_2 {
94        &self.pif_access_monitor_2
95    }
96    #[doc = "0x38 - register description"]
97    #[inline(always)]
98    pub const fn pif_access_monitor_3(&self) -> &PIF_ACCESS_MONITOR_3 {
99        &self.pif_access_monitor_3
100    }
101    #[doc = "0x3c - register description"]
102    #[inline(always)]
103    pub const fn xts_aes_key_update(&self) -> &XTS_AES_KEY_UPDATE {
104        &self.xts_aes_key_update
105    }
106    #[doc = "0x40 - register description"]
107    #[inline(always)]
108    pub const fn clock_gate(&self) -> &CLOCK_GATE {
109        &self.clock_gate
110    }
111    #[doc = "0xffc - register description"]
112    #[inline(always)]
113    pub const fn sensitive_reg_date(&self) -> &SENSITIVE_REG_DATE {
114        &self.sensitive_reg_date
115    }
116}
117#[doc = "ROM_TABLE_LOCK (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_table_lock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_table_lock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_table_lock`] module"]
118pub type ROM_TABLE_LOCK = crate::Reg<rom_table_lock::ROM_TABLE_LOCK_SPEC>;
119#[doc = "register description"]
120pub mod rom_table_lock;
121#[doc = "ROM_TABLE (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_table::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_table::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_table`] module"]
122pub type ROM_TABLE = crate::Reg<rom_table::ROM_TABLE_SPEC>;
123#[doc = "register description"]
124pub mod rom_table;
125#[doc = "APB_PERIPHERAL_ACCESS_0 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_peripheral_access_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_peripheral_access_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_peripheral_access_0`] module"]
126pub type APB_PERIPHERAL_ACCESS_0 =
127    crate::Reg<apb_peripheral_access_0::APB_PERIPHERAL_ACCESS_0_SPEC>;
128#[doc = "register description"]
129pub mod apb_peripheral_access_0;
130#[doc = "APB_PERIPHERAL_ACCESS_1 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_peripheral_access_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_peripheral_access_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_peripheral_access_1`] module"]
131pub type APB_PERIPHERAL_ACCESS_1 =
132    crate::Reg<apb_peripheral_access_1::APB_PERIPHERAL_ACCESS_1_SPEC>;
133#[doc = "register description"]
134pub mod apb_peripheral_access_1;
135#[doc = "INTERNAL_SRAM_USAGE_0 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`internal_sram_usage_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`internal_sram_usage_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@internal_sram_usage_0`] module"]
136pub type INTERNAL_SRAM_USAGE_0 = crate::Reg<internal_sram_usage_0::INTERNAL_SRAM_USAGE_0_SPEC>;
137#[doc = "register description"]
138pub mod internal_sram_usage_0;
139#[doc = "INTERNAL_SRAM_USAGE_1 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`internal_sram_usage_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`internal_sram_usage_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@internal_sram_usage_1`] module"]
140pub type INTERNAL_SRAM_USAGE_1 = crate::Reg<internal_sram_usage_1::INTERNAL_SRAM_USAGE_1_SPEC>;
141#[doc = "register description"]
142pub mod internal_sram_usage_1;
143#[doc = "INTERNAL_SRAM_USAGE_3 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`internal_sram_usage_3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`internal_sram_usage_3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@internal_sram_usage_3`] module"]
144pub type INTERNAL_SRAM_USAGE_3 = crate::Reg<internal_sram_usage_3::INTERNAL_SRAM_USAGE_3_SPEC>;
145#[doc = "register description"]
146pub mod internal_sram_usage_3;
147#[doc = "CACHE_TAG_ACCESS_0 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_tag_access_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_tag_access_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_tag_access_0`] module"]
148pub type CACHE_TAG_ACCESS_0 = crate::Reg<cache_tag_access_0::CACHE_TAG_ACCESS_0_SPEC>;
149#[doc = "register description"]
150pub mod cache_tag_access_0;
151#[doc = "CACHE_TAG_ACCESS_1 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_tag_access_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_tag_access_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_tag_access_1`] module"]
152pub type CACHE_TAG_ACCESS_1 = crate::Reg<cache_tag_access_1::CACHE_TAG_ACCESS_1_SPEC>;
153#[doc = "register description"]
154pub mod cache_tag_access_1;
155#[doc = "CACHE_MMU_ACCESS_0 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_mmu_access_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_mmu_access_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_mmu_access_0`] module"]
156pub type CACHE_MMU_ACCESS_0 = crate::Reg<cache_mmu_access_0::CACHE_MMU_ACCESS_0_SPEC>;
157#[doc = "register description"]
158pub mod cache_mmu_access_0;
159#[doc = "CACHE_MMU_ACCESS_1 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_mmu_access_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_mmu_access_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_mmu_access_1`] module"]
160pub type CACHE_MMU_ACCESS_1 = crate::Reg<cache_mmu_access_1::CACHE_MMU_ACCESS_1_SPEC>;
161#[doc = "register description"]
162pub mod cache_mmu_access_1;
163#[doc = "PIF_ACCESS_MONITOR_0 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`pif_access_monitor_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pif_access_monitor_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pif_access_monitor_0`] module"]
164pub type PIF_ACCESS_MONITOR_0 = crate::Reg<pif_access_monitor_0::PIF_ACCESS_MONITOR_0_SPEC>;
165#[doc = "register description"]
166pub mod pif_access_monitor_0;
167#[doc = "PIF_ACCESS_MONITOR_1 (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`pif_access_monitor_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pif_access_monitor_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pif_access_monitor_1`] module"]
168pub type PIF_ACCESS_MONITOR_1 = crate::Reg<pif_access_monitor_1::PIF_ACCESS_MONITOR_1_SPEC>;
169#[doc = "register description"]
170pub mod pif_access_monitor_1;
171#[doc = "PIF_ACCESS_MONITOR_2 (r) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`pif_access_monitor_2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pif_access_monitor_2`] module"]
172pub type PIF_ACCESS_MONITOR_2 = crate::Reg<pif_access_monitor_2::PIF_ACCESS_MONITOR_2_SPEC>;
173#[doc = "register description"]
174pub mod pif_access_monitor_2;
175#[doc = "PIF_ACCESS_MONITOR_3 (r) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`pif_access_monitor_3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pif_access_monitor_3`] module"]
176pub type PIF_ACCESS_MONITOR_3 = crate::Reg<pif_access_monitor_3::PIF_ACCESS_MONITOR_3_SPEC>;
177#[doc = "register description"]
178pub mod pif_access_monitor_3;
179#[doc = "XTS_AES_KEY_UPDATE (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`xts_aes_key_update::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xts_aes_key_update::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@xts_aes_key_update`] module"]
180pub type XTS_AES_KEY_UPDATE = crate::Reg<xts_aes_key_update::XTS_AES_KEY_UPDATE_SPEC>;
181#[doc = "register description"]
182pub mod xts_aes_key_update;
183#[doc = "CLOCK_GATE (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`clock_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
184pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
185#[doc = "register description"]
186pub mod clock_gate;
187#[doc = "SENSITIVE_REG_DATE (rw) register accessor: register description\n\nYou can [`read`](crate::Reg::read) this register and get [`sensitive_reg_date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sensitive_reg_date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sensitive_reg_date`] module"]
188pub type SENSITIVE_REG_DATE = crate::Reg<sensitive_reg_date::SENSITIVE_REG_DATE_SPEC>;
189#[doc = "register description"]
190pub mod sensitive_reg_date;