1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 core_0_montr_ena: CORE_0_MONTR_ENA,
6 core_0_intr_raw: CORE_0_INTR_RAW,
7 core_0_intr_ena: CORE_0_INTR_ENA,
8 core_0_intr_clr: CORE_0_INTR_CLR,
9 core_0_sp_min: CORE_0_SP_MIN,
10 core_0_sp_max: CORE_0_SP_MAX,
11 core_0_sp_pc: CORE_0_SP_PC,
12 core_0_rcd_en: CORE_0_RCD_EN,
13 core_0_rcd_pdebugpc: CORE_0_RCD_PDEBUGPC,
14 core_0_rcd_pdebugsp: CORE_0_RCD_PDEBUGSP,
15 core_0_lastpc_before_exception: CORE_0_LASTPC_BEFORE_EXCEPTION,
16 core_0_debug_mode: CORE_0_DEBUG_MODE,
17 clock_gate: CLOCK_GATE,
18 _reserved13: [u8; 0x01c8],
19 date: DATE,
20}
21impl RegisterBlock {
22 #[doc = "0x00 - core0 monitor enable configuration register"]
23 #[inline(always)]
24 pub const fn core_0_montr_ena(&self) -> &CORE_0_MONTR_ENA {
25 &self.core_0_montr_ena
26 }
27 #[doc = "0x04 - core0 monitor interrupt status register"]
28 #[inline(always)]
29 pub const fn core_0_intr_raw(&self) -> &CORE_0_INTR_RAW {
30 &self.core_0_intr_raw
31 }
32 #[doc = "0x08 - core0 monitor interrupt enable register"]
33 #[inline(always)]
34 pub const fn core_0_intr_ena(&self) -> &CORE_0_INTR_ENA {
35 &self.core_0_intr_ena
36 }
37 #[doc = "0x0c - core0 monitor interrupt clr register"]
38 #[inline(always)]
39 pub const fn core_0_intr_clr(&self) -> &CORE_0_INTR_CLR {
40 &self.core_0_intr_clr
41 }
42 #[doc = "0x10 - stack min value"]
43 #[inline(always)]
44 pub const fn core_0_sp_min(&self) -> &CORE_0_SP_MIN {
45 &self.core_0_sp_min
46 }
47 #[doc = "0x14 - stack max value"]
48 #[inline(always)]
49 pub const fn core_0_sp_max(&self) -> &CORE_0_SP_MAX {
50 &self.core_0_sp_max
51 }
52 #[doc = "0x18 - stack monitor pc status register"]
53 #[inline(always)]
54 pub const fn core_0_sp_pc(&self) -> &CORE_0_SP_PC {
55 &self.core_0_sp_pc
56 }
57 #[doc = "0x1c - record enable configuration register"]
58 #[inline(always)]
59 pub const fn core_0_rcd_en(&self) -> &CORE_0_RCD_EN {
60 &self.core_0_rcd_en
61 }
62 #[doc = "0x20 - record status regsiter"]
63 #[inline(always)]
64 pub const fn core_0_rcd_pdebugpc(&self) -> &CORE_0_RCD_PDEBUGPC {
65 &self.core_0_rcd_pdebugpc
66 }
67 #[doc = "0x24 - record status regsiter"]
68 #[inline(always)]
69 pub const fn core_0_rcd_pdebugsp(&self) -> &CORE_0_RCD_PDEBUGSP {
70 &self.core_0_rcd_pdebugsp
71 }
72 #[doc = "0x28 - cpu status register"]
73 #[inline(always)]
74 pub const fn core_0_lastpc_before_exception(&self) -> &CORE_0_LASTPC_BEFORE_EXCEPTION {
75 &self.core_0_lastpc_before_exception
76 }
77 #[doc = "0x2c - cpu status register"]
78 #[inline(always)]
79 pub const fn core_0_debug_mode(&self) -> &CORE_0_DEBUG_MODE {
80 &self.core_0_debug_mode
81 }
82 #[doc = "0x30 - clock gate register"]
83 #[inline(always)]
84 pub const fn clock_gate(&self) -> &CLOCK_GATE {
85 &self.clock_gate
86 }
87 #[doc = "0x1fc - version register"]
88 #[inline(always)]
89 pub const fn date(&self) -> &DATE {
90 &self.date
91 }
92}
93#[doc = "CORE_0_MONTR_ENA (rw) register accessor: core0 monitor enable configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_montr_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_montr_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_montr_ena`] module"]
94pub type CORE_0_MONTR_ENA = crate::Reg<core_0_montr_ena::CORE_0_MONTR_ENA_SPEC>;
95#[doc = "core0 monitor enable configuration register"]
96pub mod core_0_montr_ena;
97#[doc = "CORE_0_INTR_RAW (r) register accessor: core0 monitor interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_intr_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_intr_raw`] module"]
98pub type CORE_0_INTR_RAW = crate::Reg<core_0_intr_raw::CORE_0_INTR_RAW_SPEC>;
99#[doc = "core0 monitor interrupt status register"]
100pub mod core_0_intr_raw;
101#[doc = "CORE_0_INTR_ENA (rw) register accessor: core0 monitor interrupt enable register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_intr_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_intr_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_intr_ena`] module"]
102pub type CORE_0_INTR_ENA = crate::Reg<core_0_intr_ena::CORE_0_INTR_ENA_SPEC>;
103#[doc = "core0 monitor interrupt enable register"]
104pub mod core_0_intr_ena;
105#[doc = "CORE_0_INTR_CLR (w) register accessor: core0 monitor interrupt clr register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_intr_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_intr_clr`] module"]
106pub type CORE_0_INTR_CLR = crate::Reg<core_0_intr_clr::CORE_0_INTR_CLR_SPEC>;
107#[doc = "core0 monitor interrupt clr register"]
108pub mod core_0_intr_clr;
109#[doc = "CORE_0_SP_MIN (rw) register accessor: stack min value\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_sp_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_sp_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_sp_min`] module"]
110pub type CORE_0_SP_MIN = crate::Reg<core_0_sp_min::CORE_0_SP_MIN_SPEC>;
111#[doc = "stack min value"]
112pub mod core_0_sp_min;
113#[doc = "CORE_0_SP_MAX (rw) register accessor: stack max value\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_sp_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_sp_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_sp_max`] module"]
114pub type CORE_0_SP_MAX = crate::Reg<core_0_sp_max::CORE_0_SP_MAX_SPEC>;
115#[doc = "stack max value"]
116pub mod core_0_sp_max;
117#[doc = "CORE_0_SP_PC (r) register accessor: stack monitor pc status register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_sp_pc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_sp_pc`] module"]
118pub type CORE_0_SP_PC = crate::Reg<core_0_sp_pc::CORE_0_SP_PC_SPEC>;
119#[doc = "stack monitor pc status register"]
120pub mod core_0_sp_pc;
121#[doc = "CORE_0_RCD_EN (rw) register accessor: record enable configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_rcd_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_rcd_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_rcd_en`] module"]
122pub type CORE_0_RCD_EN = crate::Reg<core_0_rcd_en::CORE_0_RCD_EN_SPEC>;
123#[doc = "record enable configuration register"]
124pub mod core_0_rcd_en;
125#[doc = "CORE_0_RCD_PDEBUGPC (r) register accessor: record status regsiter\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_rcd_pdebugpc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_rcd_pdebugpc`] module"]
126pub type CORE_0_RCD_PDEBUGPC = crate::Reg<core_0_rcd_pdebugpc::CORE_0_RCD_PDEBUGPC_SPEC>;
127#[doc = "record status regsiter"]
128pub mod core_0_rcd_pdebugpc;
129#[doc = "CORE_0_RCD_PDEBUGSP (r) register accessor: record status regsiter\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_rcd_pdebugsp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_rcd_pdebugsp`] module"]
130pub type CORE_0_RCD_PDEBUGSP = crate::Reg<core_0_rcd_pdebugsp::CORE_0_RCD_PDEBUGSP_SPEC>;
131#[doc = "record status regsiter"]
132pub mod core_0_rcd_pdebugsp;
133#[doc = "CORE_0_LASTPC_BEFORE_EXCEPTION (r) register accessor: cpu status register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_lastpc_before_exception::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_lastpc_before_exception`] module"]
134pub type CORE_0_LASTPC_BEFORE_EXCEPTION =
135 crate::Reg<core_0_lastpc_before_exception::CORE_0_LASTPC_BEFORE_EXCEPTION_SPEC>;
136#[doc = "cpu status register"]
137pub mod core_0_lastpc_before_exception;
138#[doc = "CORE_0_DEBUG_MODE (r) register accessor: cpu status register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_debug_mode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_debug_mode`] module"]
139pub type CORE_0_DEBUG_MODE = crate::Reg<core_0_debug_mode::CORE_0_DEBUG_MODE_SPEC>;
140#[doc = "cpu status register"]
141pub mod core_0_debug_mode;
142#[doc = "CLOCK_GATE (rw) register accessor: clock gate register\n\nYou can [`read`](crate::Reg::read) this register and get [`clock_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
143pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
144#[doc = "clock gate register"]
145pub mod clock_gate;
146#[doc = "DATE (rw) register accessor: version register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
147pub type DATE = crate::Reg<date::DATE_SPEC>;
148#[doc = "version register"]
149pub mod date;