Module ctrl1

Source
Expand description

SPI1 control1 register.

Structs§

CTRL1_SPEC
SPI1 control1 register.

Type Aliases§

CLK_MODE_R
Field CLK_MODE reader - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on.
CLK_MODE_W
Field CLK_MODE writer - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on.
CS_HOLD_DLY_RES_R
Field CS_HOLD_DLY_RES reader - After RES/DP/HPM command is sent, SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 512) SPI_CLK cycles.
CS_HOLD_DLY_RES_W
Field CS_HOLD_DLY_RES writer - After RES/DP/HPM command is sent, SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 512) SPI_CLK cycles.
R
Register CTRL1 reader
W
Register CTRL1 writer