Expand description

SPI0 bit mode control register.

Structs

SPI0 bit mode control register.
Register CACHE_FCTRL reader
Register CACHE_FCTRL writer

Type Definitions

Field CACHE_FLASH_USR_CMD reader - For SPI0, cache read flash for user define command, 1: enable, 0:disable.
Field CACHE_FLASH_USR_CMD writer - For SPI0, cache read flash for user define command, 1: enable, 0:disable.
Field CACHE_REQ_EN reader - For SPI0, Cache access enable, 1: enable, 0:disable.
Field CACHE_REQ_EN writer - For SPI0, Cache access enable, 1: enable, 0:disable.
Field CACHE_USR_ADDR_4BYTE reader - For SPI0, cache read flash with 4 bytes address, 1: enable, 0:disable.
Field CACHE_USR_ADDR_4BYTE writer - For SPI0, cache read flash with 4 bytes address, 1: enable, 0:disable.
Field FADDR_DUAL reader - For SPI0 flash, address phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio.
Field FADDR_DUAL writer - For SPI0 flash, address phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio.
Field FADDR_QUAD reader - For SPI0 flash, address phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio.
Field FADDR_QUAD writer - For SPI0 flash, address phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio.
Field FDIN_DUAL reader - For SPI0 flash, din phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio.
Field FDIN_DUAL writer - For SPI0 flash, din phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio.
Field FDIN_QUAD reader - For SPI0 flash, din phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio.
Field FDIN_QUAD writer - For SPI0 flash, din phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio.
Field FDOUT_DUAL reader - For SPI0 flash, dout phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio.
Field FDOUT_DUAL writer - For SPI0 flash, dout phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_dio.
Field FDOUT_QUAD reader - For SPI0 flash, dout phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio.
Field FDOUT_QUAD writer - For SPI0 flash, dout phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_fread_qio.