esp32/uart0/
mem_tx_status.rs

1#[doc = "Register `MEM_TX_STATUS` reader"]
2pub type R = crate::R<MEM_TX_STATUS_SPEC>;
3#[doc = "Field `MEM_TX_STATUS` reader - "]
4pub type MEM_TX_STATUS_R = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:23"]
7    #[inline(always)]
8    pub fn mem_tx_status(&self) -> MEM_TX_STATUS_R {
9        MEM_TX_STATUS_R::new(self.bits & 0x00ff_ffff)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("MEM_TX_STATUS")
16            .field("mem_tx_status", &self.mem_tx_status())
17            .finish()
18    }
19}
20#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_tx_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct MEM_TX_STATUS_SPEC;
22impl crate::RegisterSpec for MEM_TX_STATUS_SPEC {
23    type Ux = u32;
24}
25#[doc = "`read()` method returns [`mem_tx_status::R`](R) reader structure"]
26impl crate::Readable for MEM_TX_STATUS_SPEC {}
27#[doc = "`reset()` method sets MEM_TX_STATUS to value 0"]
28impl crate::Resettable for MEM_TX_STATUS_SPEC {
29    const RESET_VALUE: u32 = 0;
30}