1#[doc = "Register `CONF` reader"]
2pub type R = crate::R<CONF_SPEC>;
3#[doc = "Register `CONF` writer"]
4pub type W = crate::W<CONF_SPEC>;
5#[doc = "Field `TX_RESET` reader - "]
6pub type TX_RESET_R = crate::BitReader;
7#[doc = "Field `TX_RESET` writer - "]
8pub type TX_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RX_RESET` reader - "]
10pub type RX_RESET_R = crate::BitReader;
11#[doc = "Field `RX_RESET` writer - "]
12pub type RX_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `TX_FIFO_RESET` reader - "]
14pub type TX_FIFO_RESET_R = crate::BitReader;
15#[doc = "Field `TX_FIFO_RESET` writer - "]
16pub type TX_FIFO_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `RX_FIFO_RESET` reader - "]
18pub type RX_FIFO_RESET_R = crate::BitReader;
19#[doc = "Field `RX_FIFO_RESET` writer - "]
20pub type RX_FIFO_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `TX_START` reader - "]
22pub type TX_START_R = crate::BitReader;
23#[doc = "Field `TX_START` writer - "]
24pub type TX_START_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `RX_START` reader - "]
26pub type RX_START_R = crate::BitReader;
27#[doc = "Field `RX_START` writer - "]
28pub type RX_START_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `TX_SLAVE_MOD` reader - "]
30pub type TX_SLAVE_MOD_R = crate::BitReader;
31#[doc = "Field `TX_SLAVE_MOD` writer - "]
32pub type TX_SLAVE_MOD_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `RX_SLAVE_MOD` reader - "]
34pub type RX_SLAVE_MOD_R = crate::BitReader;
35#[doc = "Field `RX_SLAVE_MOD` writer - "]
36pub type RX_SLAVE_MOD_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `TX_RIGHT_FIRST` reader - "]
38pub type TX_RIGHT_FIRST_R = crate::BitReader;
39#[doc = "Field `TX_RIGHT_FIRST` writer - "]
40pub type TX_RIGHT_FIRST_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `RX_RIGHT_FIRST` reader - "]
42pub type RX_RIGHT_FIRST_R = crate::BitReader;
43#[doc = "Field `RX_RIGHT_FIRST` writer - "]
44pub type RX_RIGHT_FIRST_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `TX_MSB_SHIFT` reader - "]
46pub type TX_MSB_SHIFT_R = crate::BitReader;
47#[doc = "Field `TX_MSB_SHIFT` writer - "]
48pub type TX_MSB_SHIFT_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `RX_MSB_SHIFT` reader - "]
50pub type RX_MSB_SHIFT_R = crate::BitReader;
51#[doc = "Field `RX_MSB_SHIFT` writer - "]
52pub type RX_MSB_SHIFT_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `TX_SHORT_SYNC` reader - "]
54pub type TX_SHORT_SYNC_R = crate::BitReader;
55#[doc = "Field `TX_SHORT_SYNC` writer - "]
56pub type TX_SHORT_SYNC_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `RX_SHORT_SYNC` reader - "]
58pub type RX_SHORT_SYNC_R = crate::BitReader;
59#[doc = "Field `RX_SHORT_SYNC` writer - "]
60pub type RX_SHORT_SYNC_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `TX_MONO` reader - "]
62pub type TX_MONO_R = crate::BitReader;
63#[doc = "Field `TX_MONO` writer - "]
64pub type TX_MONO_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `RX_MONO` reader - "]
66pub type RX_MONO_R = crate::BitReader;
67#[doc = "Field `RX_MONO` writer - "]
68pub type RX_MONO_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `TX_MSB_RIGHT` reader - "]
70pub type TX_MSB_RIGHT_R = crate::BitReader;
71#[doc = "Field `TX_MSB_RIGHT` writer - "]
72pub type TX_MSB_RIGHT_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `RX_MSB_RIGHT` reader - "]
74pub type RX_MSB_RIGHT_R = crate::BitReader;
75#[doc = "Field `RX_MSB_RIGHT` writer - "]
76pub type RX_MSB_RIGHT_W<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `SIG_LOOPBACK` reader - "]
78pub type SIG_LOOPBACK_R = crate::BitReader;
79#[doc = "Field `SIG_LOOPBACK` writer - "]
80pub type SIG_LOOPBACK_W<'a, REG> = crate::BitWriter<'a, REG>;
81impl R {
82 #[doc = "Bit 0"]
83 #[inline(always)]
84 pub fn tx_reset(&self) -> TX_RESET_R {
85 TX_RESET_R::new((self.bits & 1) != 0)
86 }
87 #[doc = "Bit 1"]
88 #[inline(always)]
89 pub fn rx_reset(&self) -> RX_RESET_R {
90 RX_RESET_R::new(((self.bits >> 1) & 1) != 0)
91 }
92 #[doc = "Bit 2"]
93 #[inline(always)]
94 pub fn tx_fifo_reset(&self) -> TX_FIFO_RESET_R {
95 TX_FIFO_RESET_R::new(((self.bits >> 2) & 1) != 0)
96 }
97 #[doc = "Bit 3"]
98 #[inline(always)]
99 pub fn rx_fifo_reset(&self) -> RX_FIFO_RESET_R {
100 RX_FIFO_RESET_R::new(((self.bits >> 3) & 1) != 0)
101 }
102 #[doc = "Bit 4"]
103 #[inline(always)]
104 pub fn tx_start(&self) -> TX_START_R {
105 TX_START_R::new(((self.bits >> 4) & 1) != 0)
106 }
107 #[doc = "Bit 5"]
108 #[inline(always)]
109 pub fn rx_start(&self) -> RX_START_R {
110 RX_START_R::new(((self.bits >> 5) & 1) != 0)
111 }
112 #[doc = "Bit 6"]
113 #[inline(always)]
114 pub fn tx_slave_mod(&self) -> TX_SLAVE_MOD_R {
115 TX_SLAVE_MOD_R::new(((self.bits >> 6) & 1) != 0)
116 }
117 #[doc = "Bit 7"]
118 #[inline(always)]
119 pub fn rx_slave_mod(&self) -> RX_SLAVE_MOD_R {
120 RX_SLAVE_MOD_R::new(((self.bits >> 7) & 1) != 0)
121 }
122 #[doc = "Bit 8"]
123 #[inline(always)]
124 pub fn tx_right_first(&self) -> TX_RIGHT_FIRST_R {
125 TX_RIGHT_FIRST_R::new(((self.bits >> 8) & 1) != 0)
126 }
127 #[doc = "Bit 9"]
128 #[inline(always)]
129 pub fn rx_right_first(&self) -> RX_RIGHT_FIRST_R {
130 RX_RIGHT_FIRST_R::new(((self.bits >> 9) & 1) != 0)
131 }
132 #[doc = "Bit 10"]
133 #[inline(always)]
134 pub fn tx_msb_shift(&self) -> TX_MSB_SHIFT_R {
135 TX_MSB_SHIFT_R::new(((self.bits >> 10) & 1) != 0)
136 }
137 #[doc = "Bit 11"]
138 #[inline(always)]
139 pub fn rx_msb_shift(&self) -> RX_MSB_SHIFT_R {
140 RX_MSB_SHIFT_R::new(((self.bits >> 11) & 1) != 0)
141 }
142 #[doc = "Bit 12"]
143 #[inline(always)]
144 pub fn tx_short_sync(&self) -> TX_SHORT_SYNC_R {
145 TX_SHORT_SYNC_R::new(((self.bits >> 12) & 1) != 0)
146 }
147 #[doc = "Bit 13"]
148 #[inline(always)]
149 pub fn rx_short_sync(&self) -> RX_SHORT_SYNC_R {
150 RX_SHORT_SYNC_R::new(((self.bits >> 13) & 1) != 0)
151 }
152 #[doc = "Bit 14"]
153 #[inline(always)]
154 pub fn tx_mono(&self) -> TX_MONO_R {
155 TX_MONO_R::new(((self.bits >> 14) & 1) != 0)
156 }
157 #[doc = "Bit 15"]
158 #[inline(always)]
159 pub fn rx_mono(&self) -> RX_MONO_R {
160 RX_MONO_R::new(((self.bits >> 15) & 1) != 0)
161 }
162 #[doc = "Bit 16"]
163 #[inline(always)]
164 pub fn tx_msb_right(&self) -> TX_MSB_RIGHT_R {
165 TX_MSB_RIGHT_R::new(((self.bits >> 16) & 1) != 0)
166 }
167 #[doc = "Bit 17"]
168 #[inline(always)]
169 pub fn rx_msb_right(&self) -> RX_MSB_RIGHT_R {
170 RX_MSB_RIGHT_R::new(((self.bits >> 17) & 1) != 0)
171 }
172 #[doc = "Bit 18"]
173 #[inline(always)]
174 pub fn sig_loopback(&self) -> SIG_LOOPBACK_R {
175 SIG_LOOPBACK_R::new(((self.bits >> 18) & 1) != 0)
176 }
177}
178#[cfg(feature = "impl-register-debug")]
179impl core::fmt::Debug for R {
180 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
181 f.debug_struct("CONF")
182 .field("tx_reset", &self.tx_reset())
183 .field("rx_reset", &self.rx_reset())
184 .field("tx_fifo_reset", &self.tx_fifo_reset())
185 .field("rx_fifo_reset", &self.rx_fifo_reset())
186 .field("tx_start", &self.tx_start())
187 .field("rx_start", &self.rx_start())
188 .field("tx_slave_mod", &self.tx_slave_mod())
189 .field("rx_slave_mod", &self.rx_slave_mod())
190 .field("tx_right_first", &self.tx_right_first())
191 .field("rx_right_first", &self.rx_right_first())
192 .field("tx_msb_shift", &self.tx_msb_shift())
193 .field("rx_msb_shift", &self.rx_msb_shift())
194 .field("tx_short_sync", &self.tx_short_sync())
195 .field("rx_short_sync", &self.rx_short_sync())
196 .field("tx_mono", &self.tx_mono())
197 .field("rx_mono", &self.rx_mono())
198 .field("tx_msb_right", &self.tx_msb_right())
199 .field("rx_msb_right", &self.rx_msb_right())
200 .field("sig_loopback", &self.sig_loopback())
201 .finish()
202 }
203}
204impl W {
205 #[doc = "Bit 0"]
206 #[inline(always)]
207 pub fn tx_reset(&mut self) -> TX_RESET_W<CONF_SPEC> {
208 TX_RESET_W::new(self, 0)
209 }
210 #[doc = "Bit 1"]
211 #[inline(always)]
212 pub fn rx_reset(&mut self) -> RX_RESET_W<CONF_SPEC> {
213 RX_RESET_W::new(self, 1)
214 }
215 #[doc = "Bit 2"]
216 #[inline(always)]
217 pub fn tx_fifo_reset(&mut self) -> TX_FIFO_RESET_W<CONF_SPEC> {
218 TX_FIFO_RESET_W::new(self, 2)
219 }
220 #[doc = "Bit 3"]
221 #[inline(always)]
222 pub fn rx_fifo_reset(&mut self) -> RX_FIFO_RESET_W<CONF_SPEC> {
223 RX_FIFO_RESET_W::new(self, 3)
224 }
225 #[doc = "Bit 4"]
226 #[inline(always)]
227 pub fn tx_start(&mut self) -> TX_START_W<CONF_SPEC> {
228 TX_START_W::new(self, 4)
229 }
230 #[doc = "Bit 5"]
231 #[inline(always)]
232 pub fn rx_start(&mut self) -> RX_START_W<CONF_SPEC> {
233 RX_START_W::new(self, 5)
234 }
235 #[doc = "Bit 6"]
236 #[inline(always)]
237 pub fn tx_slave_mod(&mut self) -> TX_SLAVE_MOD_W<CONF_SPEC> {
238 TX_SLAVE_MOD_W::new(self, 6)
239 }
240 #[doc = "Bit 7"]
241 #[inline(always)]
242 pub fn rx_slave_mod(&mut self) -> RX_SLAVE_MOD_W<CONF_SPEC> {
243 RX_SLAVE_MOD_W::new(self, 7)
244 }
245 #[doc = "Bit 8"]
246 #[inline(always)]
247 pub fn tx_right_first(&mut self) -> TX_RIGHT_FIRST_W<CONF_SPEC> {
248 TX_RIGHT_FIRST_W::new(self, 8)
249 }
250 #[doc = "Bit 9"]
251 #[inline(always)]
252 pub fn rx_right_first(&mut self) -> RX_RIGHT_FIRST_W<CONF_SPEC> {
253 RX_RIGHT_FIRST_W::new(self, 9)
254 }
255 #[doc = "Bit 10"]
256 #[inline(always)]
257 pub fn tx_msb_shift(&mut self) -> TX_MSB_SHIFT_W<CONF_SPEC> {
258 TX_MSB_SHIFT_W::new(self, 10)
259 }
260 #[doc = "Bit 11"]
261 #[inline(always)]
262 pub fn rx_msb_shift(&mut self) -> RX_MSB_SHIFT_W<CONF_SPEC> {
263 RX_MSB_SHIFT_W::new(self, 11)
264 }
265 #[doc = "Bit 12"]
266 #[inline(always)]
267 pub fn tx_short_sync(&mut self) -> TX_SHORT_SYNC_W<CONF_SPEC> {
268 TX_SHORT_SYNC_W::new(self, 12)
269 }
270 #[doc = "Bit 13"]
271 #[inline(always)]
272 pub fn rx_short_sync(&mut self) -> RX_SHORT_SYNC_W<CONF_SPEC> {
273 RX_SHORT_SYNC_W::new(self, 13)
274 }
275 #[doc = "Bit 14"]
276 #[inline(always)]
277 pub fn tx_mono(&mut self) -> TX_MONO_W<CONF_SPEC> {
278 TX_MONO_W::new(self, 14)
279 }
280 #[doc = "Bit 15"]
281 #[inline(always)]
282 pub fn rx_mono(&mut self) -> RX_MONO_W<CONF_SPEC> {
283 RX_MONO_W::new(self, 15)
284 }
285 #[doc = "Bit 16"]
286 #[inline(always)]
287 pub fn tx_msb_right(&mut self) -> TX_MSB_RIGHT_W<CONF_SPEC> {
288 TX_MSB_RIGHT_W::new(self, 16)
289 }
290 #[doc = "Bit 17"]
291 #[inline(always)]
292 pub fn rx_msb_right(&mut self) -> RX_MSB_RIGHT_W<CONF_SPEC> {
293 RX_MSB_RIGHT_W::new(self, 17)
294 }
295 #[doc = "Bit 18"]
296 #[inline(always)]
297 pub fn sig_loopback(&mut self) -> SIG_LOOPBACK_W<CONF_SPEC> {
298 SIG_LOOPBACK_W::new(self, 18)
299 }
300}
301#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
302pub struct CONF_SPEC;
303impl crate::RegisterSpec for CONF_SPEC {
304 type Ux = u32;
305}
306#[doc = "`read()` method returns [`conf::R`](R) reader structure"]
307impl crate::Readable for CONF_SPEC {}
308#[doc = "`write(|w| ..)` method takes [`conf::W`](W) writer structure"]
309impl crate::Writable for CONF_SPEC {
310 type Safety = crate::Unsafe;
311 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
312 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
313}
314#[doc = "`reset()` method sets CONF to value 0x0003_0300"]
315impl crate::Resettable for CONF_SPEC {
316 const RESET_VALUE: u32 = 0x0003_0300;
317}