esp32/gpio/
cpusdio_int.rs1#[doc = "Register `CPUSDIO_INT` reader"]
2pub type R = crate::R<CPUSDIO_INT_SPEC>;
3#[doc = "Field `SDIO_INT` reader - SDIO's extent GPIO0~31 interrupt"]
4pub type SDIO_INT_R = crate::FieldReader<u32>;
5impl R {
6 #[doc = "Bits 0:31 - SDIO's extent GPIO0~31 interrupt"]
7 #[inline(always)]
8 pub fn sdio_int(&self) -> SDIO_INT_R {
9 SDIO_INT_R::new(self.bits)
10 }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15 f.debug_struct("CPUSDIO_INT")
16 .field("sdio_int", &self.sdio_int())
17 .finish()
18 }
19}
20#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`cpusdio_int::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct CPUSDIO_INT_SPEC;
22impl crate::RegisterSpec for CPUSDIO_INT_SPEC {
23 type Ux = u32;
24}
25#[doc = "`read()` method returns [`cpusdio_int::R`](R) reader structure"]
26impl crate::Readable for CPUSDIO_INT_SPEC {}
27#[doc = "`reset()` method sets CPUSDIO_INT to value 0"]
28impl crate::Resettable for CPUSDIO_INT_SPEC {
29 const RESET_VALUE: u32 = 0;
30}