esp32/spi0/
ext0.rs

1#[doc = "Register `EXT0` reader"]
2pub type R = crate::R<EXT0_SPEC>;
3#[doc = "Register `EXT0` writer"]
4pub type W = crate::W<EXT0_SPEC>;
5#[doc = "Field `T_PP_TIME` reader - page program delay time by system clock."]
6pub type T_PP_TIME_R = crate::FieldReader<u16>;
7#[doc = "Field `T_PP_TIME` writer - page program delay time by system clock."]
8pub type T_PP_TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
9#[doc = "Field `T_PP_SHIFT` reader - page program delay time shift ."]
10pub type T_PP_SHIFT_R = crate::FieldReader;
11#[doc = "Field `T_PP_SHIFT` writer - page program delay time shift ."]
12pub type T_PP_SHIFT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
13#[doc = "Field `T_PP_ENA` reader - page program delay enable."]
14pub type T_PP_ENA_R = crate::BitReader;
15#[doc = "Field `T_PP_ENA` writer - page program delay enable."]
16pub type T_PP_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bits 0:11 - page program delay time by system clock."]
19    #[inline(always)]
20    pub fn t_pp_time(&self) -> T_PP_TIME_R {
21        T_PP_TIME_R::new((self.bits & 0x0fff) as u16)
22    }
23    #[doc = "Bits 16:19 - page program delay time shift ."]
24    #[inline(always)]
25    pub fn t_pp_shift(&self) -> T_PP_SHIFT_R {
26        T_PP_SHIFT_R::new(((self.bits >> 16) & 0x0f) as u8)
27    }
28    #[doc = "Bit 31 - page program delay enable."]
29    #[inline(always)]
30    pub fn t_pp_ena(&self) -> T_PP_ENA_R {
31        T_PP_ENA_R::new(((self.bits >> 31) & 1) != 0)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("EXT0")
38            .field("t_pp_time", &self.t_pp_time())
39            .field("t_pp_shift", &self.t_pp_shift())
40            .field("t_pp_ena", &self.t_pp_ena())
41            .finish()
42    }
43}
44impl W {
45    #[doc = "Bits 0:11 - page program delay time by system clock."]
46    #[inline(always)]
47    pub fn t_pp_time(&mut self) -> T_PP_TIME_W<EXT0_SPEC> {
48        T_PP_TIME_W::new(self, 0)
49    }
50    #[doc = "Bits 16:19 - page program delay time shift ."]
51    #[inline(always)]
52    pub fn t_pp_shift(&mut self) -> T_PP_SHIFT_W<EXT0_SPEC> {
53        T_PP_SHIFT_W::new(self, 16)
54    }
55    #[doc = "Bit 31 - page program delay enable."]
56    #[inline(always)]
57    pub fn t_pp_ena(&mut self) -> T_PP_ENA_W<EXT0_SPEC> {
58        T_PP_ENA_W::new(self, 31)
59    }
60}
61#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`ext0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ext0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct EXT0_SPEC;
63impl crate::RegisterSpec for EXT0_SPEC {
64    type Ux = u32;
65}
66#[doc = "`read()` method returns [`ext0::R`](R) reader structure"]
67impl crate::Readable for EXT0_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`ext0::W`](W) writer structure"]
69impl crate::Writable for EXT0_SPEC {
70    type Safety = crate::Unsafe;
71    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
73}
74#[doc = "`reset()` method sets EXT0 to value 0x800a_0050"]
75impl crate::Resettable for EXT0_SPEC {
76    const RESET_VALUE: u32 = 0x800a_0050;
77}
esp32/spi0/ext0.rs

esp32/spi0/
ext0.rs
