1#[doc = "Register `UHS` reader"]
2pub type R = crate::R<UHS_SPEC>;
3#[doc = "Register `UHS` writer"]
4pub type W = crate::W<UHS_SPEC>;
5#[doc = "Field `DDR` reader - DDR mode selecton,1 bit for each card. 0-Non-DDR mdoe. 1-DDR mdoe."]
6pub type DDR_R = crate::FieldReader;
7#[doc = "Field `DDR` writer - DDR mode selecton,1 bit for each card. 0-Non-DDR mdoe. 1-DDR mdoe."]
8pub type DDR_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9impl R {
10 #[doc = "Bits 16:17 - DDR mode selecton,1 bit for each card. 0-Non-DDR mdoe. 1-DDR mdoe."]
11 #[inline(always)]
12 pub fn ddr(&self) -> DDR_R {
13 DDR_R::new(((self.bits >> 16) & 3) as u8)
14 }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19 f.debug_struct("UHS").field("ddr", &self.ddr()).finish()
20 }
21}
22impl W {
23 #[doc = "Bits 16:17 - DDR mode selecton,1 bit for each card. 0-Non-DDR mdoe. 1-DDR mdoe."]
24 #[inline(always)]
25 pub fn ddr(&mut self) -> DDR_W<UHS_SPEC> {
26 DDR_W::new(self, 16)
27 }
28}
29#[doc = "UHS-1 register\n\nYou can [`read`](crate::Reg::read) this register and get [`uhs::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uhs::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
30pub struct UHS_SPEC;
31impl crate::RegisterSpec for UHS_SPEC {
32 type Ux = u32;
33}
34#[doc = "`read()` method returns [`uhs::R`](R) reader structure"]
35impl crate::Readable for UHS_SPEC {}
36#[doc = "`write(|w| ..)` method takes [`uhs::W`](W) writer structure"]
37impl crate::Writable for UHS_SPEC {
38 type Safety = crate::Unsafe;
39 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
40 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
41}
42#[doc = "`reset()` method sets UHS to value 0"]
43impl crate::Resettable for UHS_SPEC {
44 const RESET_VALUE: u32 = 0;
45}