esp32/dport/
appcpu_ctrl_c.rs

1#[doc = "Register `APPCPU_CTRL_C` reader"]
2pub type R = crate::R<APPCPU_CTRL_C_SPEC>;
3#[doc = "Register `APPCPU_CTRL_C` writer"]
4pub type W = crate::W<APPCPU_CTRL_C_SPEC>;
5#[doc = "Field `APPCPU_RUNSTALL` reader - "]
6pub type APPCPU_RUNSTALL_R = crate::BitReader;
7#[doc = "Field `APPCPU_RUNSTALL` writer - "]
8pub type APPCPU_RUNSTALL_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    #[doc = "Bit 0"]
11    #[inline(always)]
12    pub fn appcpu_runstall(&self) -> APPCPU_RUNSTALL_R {
13        APPCPU_RUNSTALL_R::new((self.bits & 1) != 0)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("APPCPU_CTRL_C")
20            .field("appcpu_runstall", &self.appcpu_runstall())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bit 0"]
26    #[inline(always)]
27    pub fn appcpu_runstall(&mut self) -> APPCPU_RUNSTALL_W<APPCPU_CTRL_C_SPEC> {
28        APPCPU_RUNSTALL_W::new(self, 0)
29    }
30}
31#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`appcpu_ctrl_c::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`appcpu_ctrl_c::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct APPCPU_CTRL_C_SPEC;
33impl crate::RegisterSpec for APPCPU_CTRL_C_SPEC {
34    type Ux = u32;
35}
36#[doc = "`read()` method returns [`appcpu_ctrl_c::R`](R) reader structure"]
37impl crate::Readable for APPCPU_CTRL_C_SPEC {}
38#[doc = "`write(|w| ..)` method takes [`appcpu_ctrl_c::W`](W) writer structure"]
39impl crate::Writable for APPCPU_CTRL_C_SPEC {
40    type Safety = crate::Unsafe;
41    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
42    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43}
44#[doc = "`reset()` method sets APPCPU_CTRL_C to value 0"]
45impl crate::Resettable for APPCPU_CTRL_C_SPEC {
46    const RESET_VALUE: u32 = 0;
47}
esp32/dport/appcpu_ctrl_c.rs

esp32/dport/
appcpu_ctrl_c.rs
