esp32/rtc_cntl/
timer2.rs

1#[doc = "Register `TIMER2` reader"]
2pub type R = crate::R<TIMER2_SPEC>;
3#[doc = "Register `TIMER2` writer"]
4pub type W = crate::W<TIMER2_SPEC>;
5#[doc = "Field `ULPCP_TOUCH_START_WAIT` reader - wait cycles in slow_clk_rtc before ULP-coprocessor / touch controller start to work"]
6pub type ULPCP_TOUCH_START_WAIT_R = crate::FieldReader<u16>;
7#[doc = "Field `ULPCP_TOUCH_START_WAIT` writer - wait cycles in slow_clk_rtc before ULP-coprocessor / touch controller start to work"]
8pub type ULPCP_TOUCH_START_WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9#[doc = "Field `MIN_TIME_CK8M_OFF` reader - minimal cycles in slow_clk_rtc for CK8M in power down state"]
10pub type MIN_TIME_CK8M_OFF_R = crate::FieldReader;
11#[doc = "Field `MIN_TIME_CK8M_OFF` writer - minimal cycles in slow_clk_rtc for CK8M in power down state"]
12pub type MIN_TIME_CK8M_OFF_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13impl R {
14    #[doc = "Bits 15:23 - wait cycles in slow_clk_rtc before ULP-coprocessor / touch controller start to work"]
15    #[inline(always)]
16    pub fn ulpcp_touch_start_wait(&self) -> ULPCP_TOUCH_START_WAIT_R {
17        ULPCP_TOUCH_START_WAIT_R::new(((self.bits >> 15) & 0x01ff) as u16)
18    }
19    #[doc = "Bits 24:31 - minimal cycles in slow_clk_rtc for CK8M in power down state"]
20    #[inline(always)]
21    pub fn min_time_ck8m_off(&self) -> MIN_TIME_CK8M_OFF_R {
22        MIN_TIME_CK8M_OFF_R::new(((self.bits >> 24) & 0xff) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("TIMER2")
29            .field("ulpcp_touch_start_wait", &self.ulpcp_touch_start_wait())
30            .field("min_time_ck8m_off", &self.min_time_ck8m_off())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bits 15:23 - wait cycles in slow_clk_rtc before ULP-coprocessor / touch controller start to work"]
36    #[inline(always)]
37    pub fn ulpcp_touch_start_wait(&mut self) -> ULPCP_TOUCH_START_WAIT_W<TIMER2_SPEC> {
38        ULPCP_TOUCH_START_WAIT_W::new(self, 15)
39    }
40    #[doc = "Bits 24:31 - minimal cycles in slow_clk_rtc for CK8M in power down state"]
41    #[inline(always)]
42    pub fn min_time_ck8m_off(&mut self) -> MIN_TIME_CK8M_OFF_W<TIMER2_SPEC> {
43        MIN_TIME_CK8M_OFF_W::new(self, 24)
44    }
45}
46#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`timer2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
47pub struct TIMER2_SPEC;
48impl crate::RegisterSpec for TIMER2_SPEC {
49    type Ux = u32;
50}
51#[doc = "`read()` method returns [`timer2::R`](R) reader structure"]
52impl crate::Readable for TIMER2_SPEC {}
53#[doc = "`write(|w| ..)` method takes [`timer2::W`](W) writer structure"]
54impl crate::Writable for TIMER2_SPEC {
55    type Safety = crate::Unsafe;
56}
57#[doc = "`reset()` method sets TIMER2 to value 0x0108_0000"]
58impl crate::Resettable for TIMER2_SPEC {
59    const RESET_VALUE: u32 = 0x0108_0000;
60}
esp32/rtc_cntl/timer2.rs

esp32/rtc_cntl/
timer2.rs
