esp32/dport/
slave_spi_config.rs

1#[doc = "Register `SLAVE_SPI_CONFIG` reader"]
2pub type R = crate::R<SLAVE_SPI_CONFIG_SPEC>;
3#[doc = "Register `SLAVE_SPI_CONFIG` writer"]
4pub type W = crate::W<SLAVE_SPI_CONFIG_SPEC>;
5#[doc = "Field `SLAVE_SPI_MASK_PRO` reader - "]
6pub type SLAVE_SPI_MASK_PRO_R = crate::BitReader;
7#[doc = "Field `SLAVE_SPI_MASK_PRO` writer - "]
8pub type SLAVE_SPI_MASK_PRO_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SLAVE_SPI_MASK_APP` reader - "]
10pub type SLAVE_SPI_MASK_APP_R = crate::BitReader;
11#[doc = "Field `SLAVE_SPI_MASK_APP` writer - "]
12pub type SLAVE_SPI_MASK_APP_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SPI_ENCRYPT_ENABLE` reader - "]
14pub type SPI_ENCRYPT_ENABLE_R = crate::BitReader;
15#[doc = "Field `SPI_ENCRYPT_ENABLE` writer - "]
16pub type SPI_ENCRYPT_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SPI_DECRYPT_ENABLE` reader - "]
18pub type SPI_DECRYPT_ENABLE_R = crate::BitReader;
19#[doc = "Field `SPI_DECRYPT_ENABLE` writer - "]
20pub type SPI_DECRYPT_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bit 0"]
23    #[inline(always)]
24    pub fn slave_spi_mask_pro(&self) -> SLAVE_SPI_MASK_PRO_R {
25        SLAVE_SPI_MASK_PRO_R::new((self.bits & 1) != 0)
26    }
27    #[doc = "Bit 4"]
28    #[inline(always)]
29    pub fn slave_spi_mask_app(&self) -> SLAVE_SPI_MASK_APP_R {
30        SLAVE_SPI_MASK_APP_R::new(((self.bits >> 4) & 1) != 0)
31    }
32    #[doc = "Bit 8"]
33    #[inline(always)]
34    pub fn spi_encrypt_enable(&self) -> SPI_ENCRYPT_ENABLE_R {
35        SPI_ENCRYPT_ENABLE_R::new(((self.bits >> 8) & 1) != 0)
36    }
37    #[doc = "Bit 12"]
38    #[inline(always)]
39    pub fn spi_decrypt_enable(&self) -> SPI_DECRYPT_ENABLE_R {
40        SPI_DECRYPT_ENABLE_R::new(((self.bits >> 12) & 1) != 0)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("SLAVE_SPI_CONFIG")
47            .field("slave_spi_mask_pro", &self.slave_spi_mask_pro())
48            .field("slave_spi_mask_app", &self.slave_spi_mask_app())
49            .field("spi_encrypt_enable", &self.spi_encrypt_enable())
50            .field("spi_decrypt_enable", &self.spi_decrypt_enable())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bit 0"]
56    #[inline(always)]
57    pub fn slave_spi_mask_pro(&mut self) -> SLAVE_SPI_MASK_PRO_W<SLAVE_SPI_CONFIG_SPEC> {
58        SLAVE_SPI_MASK_PRO_W::new(self, 0)
59    }
60    #[doc = "Bit 4"]
61    #[inline(always)]
62    pub fn slave_spi_mask_app(&mut self) -> SLAVE_SPI_MASK_APP_W<SLAVE_SPI_CONFIG_SPEC> {
63        SLAVE_SPI_MASK_APP_W::new(self, 4)
64    }
65    #[doc = "Bit 8"]
66    #[inline(always)]
67    pub fn spi_encrypt_enable(&mut self) -> SPI_ENCRYPT_ENABLE_W<SLAVE_SPI_CONFIG_SPEC> {
68        SPI_ENCRYPT_ENABLE_W::new(self, 8)
69    }
70    #[doc = "Bit 12"]
71    #[inline(always)]
72    pub fn spi_decrypt_enable(&mut self) -> SPI_DECRYPT_ENABLE_W<SLAVE_SPI_CONFIG_SPEC> {
73        SPI_DECRYPT_ENABLE_W::new(self, 12)
74    }
75}
76#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`slave_spi_config::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slave_spi_config::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct SLAVE_SPI_CONFIG_SPEC;
78impl crate::RegisterSpec for SLAVE_SPI_CONFIG_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`slave_spi_config::R`](R) reader structure"]
82impl crate::Readable for SLAVE_SPI_CONFIG_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`slave_spi_config::W`](W) writer structure"]
84impl crate::Writable for SLAVE_SPI_CONFIG_SPEC {
85    type Safety = crate::Unsafe;
86}
87#[doc = "`reset()` method sets SLAVE_SPI_CONFIG to value 0"]
88impl crate::Resettable for SLAVE_SPI_CONFIG_SPEC {}
esp32/dport/slave_spi_config.rs

esp32/dport/
slave_spi_config.rs
