esp32/dport/
pro_cpu_record_pdebuginst.rs1#[doc = "Register `PRO_CPU_RECORD_PDEBUGINST` reader"]
2pub type R = crate::R<PRO_CPU_RECORD_PDEBUGINST_SPEC>;
3#[doc = "Register `PRO_CPU_RECORD_PDEBUGINST` writer"]
4pub type W = crate::W<PRO_CPU_RECORD_PDEBUGINST_SPEC>;
5#[doc = "Field `RECORD_PRO_PDEBUGINST` reader - "]
6pub type RECORD_PRO_PDEBUGINST_R = crate::FieldReader<u32>;
7#[doc = "Field `RECORD_PDEBUGINST_SZ` reader - "]
8pub type RECORD_PDEBUGINST_SZ_R = crate::FieldReader;
9#[doc = "Field `RECORD_PDEBUGINST_SZ` writer - "]
10pub type RECORD_PDEBUGINST_SZ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
11#[doc = "Field `RECORD_PDEBUGINST_ISRC` reader - "]
12pub type RECORD_PDEBUGINST_ISRC_R = crate::FieldReader;
13#[doc = "Field `RECORD_PDEBUGINST_ISRC` writer - "]
14pub type RECORD_PDEBUGINST_ISRC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
15#[doc = "Field `RECORD_PDEBUGINST_LOOP_REP` reader - "]
16pub type RECORD_PDEBUGINST_LOOP_REP_R = crate::BitReader;
17#[doc = "Field `RECORD_PDEBUGINST_LOOP_REP` writer - "]
18pub type RECORD_PDEBUGINST_LOOP_REP_W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `RECORD_PDEBUGINST_LOOP` reader - "]
20pub type RECORD_PDEBUGINST_LOOP_R = crate::BitReader;
21#[doc = "Field `RECORD_PDEBUGINST_LOOP` writer - "]
22pub type RECORD_PDEBUGINST_LOOP_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `RECORD_PDEBUGINST_CINTL` reader - "]
24pub type RECORD_PDEBUGINST_CINTL_R = crate::FieldReader;
25#[doc = "Field `RECORD_PDEBUGINST_CINTL` writer - "]
26pub type RECORD_PDEBUGINST_CINTL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
27impl R {
28 #[doc = "Bits 0:31"]
29 #[inline(always)]
30 pub fn record_pro_pdebuginst(&self) -> RECORD_PRO_PDEBUGINST_R {
31 RECORD_PRO_PDEBUGINST_R::new(self.bits)
32 }
33 #[doc = "Bits 0:7"]
34 #[inline(always)]
35 pub fn record_pdebuginst_sz(&self) -> RECORD_PDEBUGINST_SZ_R {
36 RECORD_PDEBUGINST_SZ_R::new((self.bits & 0xff) as u8)
37 }
38 #[doc = "Bits 12:14"]
39 #[inline(always)]
40 pub fn record_pdebuginst_isrc(&self) -> RECORD_PDEBUGINST_ISRC_R {
41 RECORD_PDEBUGINST_ISRC_R::new(((self.bits >> 12) & 7) as u8)
42 }
43 #[doc = "Bit 20"]
44 #[inline(always)]
45 pub fn record_pdebuginst_loop_rep(&self) -> RECORD_PDEBUGINST_LOOP_REP_R {
46 RECORD_PDEBUGINST_LOOP_REP_R::new(((self.bits >> 20) & 1) != 0)
47 }
48 #[doc = "Bit 21"]
49 #[inline(always)]
50 pub fn record_pdebuginst_loop(&self) -> RECORD_PDEBUGINST_LOOP_R {
51 RECORD_PDEBUGINST_LOOP_R::new(((self.bits >> 21) & 1) != 0)
52 }
53 #[doc = "Bits 24:27"]
54 #[inline(always)]
55 pub fn record_pdebuginst_cintl(&self) -> RECORD_PDEBUGINST_CINTL_R {
56 RECORD_PDEBUGINST_CINTL_R::new(((self.bits >> 24) & 0x0f) as u8)
57 }
58}
59#[cfg(feature = "impl-register-debug")]
60impl core::fmt::Debug for R {
61 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
62 f.debug_struct("PRO_CPU_RECORD_PDEBUGINST")
63 .field("record_pro_pdebuginst", &self.record_pro_pdebuginst())
64 .field("record_pdebuginst_sz", &self.record_pdebuginst_sz())
65 .field("record_pdebuginst_isrc", &self.record_pdebuginst_isrc())
66 .field(
67 "record_pdebuginst_loop_rep",
68 &self.record_pdebuginst_loop_rep(),
69 )
70 .field("record_pdebuginst_loop", &self.record_pdebuginst_loop())
71 .field("record_pdebuginst_cintl", &self.record_pdebuginst_cintl())
72 .finish()
73 }
74}
75impl W {
76 #[doc = "Bits 0:7"]
77 #[inline(always)]
78 pub fn record_pdebuginst_sz(
79 &mut self,
80 ) -> RECORD_PDEBUGINST_SZ_W<PRO_CPU_RECORD_PDEBUGINST_SPEC> {
81 RECORD_PDEBUGINST_SZ_W::new(self, 0)
82 }
83 #[doc = "Bits 12:14"]
84 #[inline(always)]
85 pub fn record_pdebuginst_isrc(
86 &mut self,
87 ) -> RECORD_PDEBUGINST_ISRC_W<PRO_CPU_RECORD_PDEBUGINST_SPEC> {
88 RECORD_PDEBUGINST_ISRC_W::new(self, 12)
89 }
90 #[doc = "Bit 20"]
91 #[inline(always)]
92 pub fn record_pdebuginst_loop_rep(
93 &mut self,
94 ) -> RECORD_PDEBUGINST_LOOP_REP_W<PRO_CPU_RECORD_PDEBUGINST_SPEC> {
95 RECORD_PDEBUGINST_LOOP_REP_W::new(self, 20)
96 }
97 #[doc = "Bit 21"]
98 #[inline(always)]
99 pub fn record_pdebuginst_loop(
100 &mut self,
101 ) -> RECORD_PDEBUGINST_LOOP_W<PRO_CPU_RECORD_PDEBUGINST_SPEC> {
102 RECORD_PDEBUGINST_LOOP_W::new(self, 21)
103 }
104 #[doc = "Bits 24:27"]
105 #[inline(always)]
106 pub fn record_pdebuginst_cintl(
107 &mut self,
108 ) -> RECORD_PDEBUGINST_CINTL_W<PRO_CPU_RECORD_PDEBUGINST_SPEC> {
109 RECORD_PDEBUGINST_CINTL_W::new(self, 24)
110 }
111}
112#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_cpu_record_pdebuginst::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_cpu_record_pdebuginst::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
113pub struct PRO_CPU_RECORD_PDEBUGINST_SPEC;
114impl crate::RegisterSpec for PRO_CPU_RECORD_PDEBUGINST_SPEC {
115 type Ux = u32;
116}
117#[doc = "`read()` method returns [`pro_cpu_record_pdebuginst::R`](R) reader structure"]
118impl crate::Readable for PRO_CPU_RECORD_PDEBUGINST_SPEC {}
119#[doc = "`write(|w| ..)` method takes [`pro_cpu_record_pdebuginst::W`](W) writer structure"]
120impl crate::Writable for PRO_CPU_RECORD_PDEBUGINST_SPEC {
121 type Safety = crate::Unsafe;
122 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
123 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
124}
125#[doc = "`reset()` method sets PRO_CPU_RECORD_PDEBUGINST to value 0"]
126impl crate::Resettable for PRO_CPU_RECORD_PDEBUGINST_SPEC {
127 const RESET_VALUE: u32 = 0;
128}