Module pin

Structs

PIN_SPEC

You can read this register and get pin::R. You can reset, write, write_with_zero this register using pin::W. You can also modify this register. See API.

Type Aliases

CK_DIS_R

Field CK_DIS reader - 1: spi clk out disable 0: spi clk out enable

CK_DIS_W

Field CK_DIS writer - 1: spi clk out disable 0: spi clk out enable

CK_IDLE_EDGE_R

Field CK_IDLE_EDGE reader - 1: spi clk line is high when idle 0: spi clk line is low when idle

CK_IDLE_EDGE_W

Field CK_IDLE_EDGE writer - 1: spi clk line is high when idle 0: spi clk line is low when idle

CS_DIS_R

Field CS_DIS(0-2) reader - Set this bit to raise high SPI_CS%s pin, which means that the SPI device(Ext_RAM(0)/flash(1)) connected to SPI_CS%s is in low level when SPI1 transfer starts

CS_DIS_W

Field CS_DIS(0-2) writer - Set this bit to raise high SPI_CS%s pin, which means that the SPI device(Ext_RAM(0)/flash(1)) connected to SPI_CS%s is in low level when SPI1 transfer starts

CS_KEEP_ACTIVE_R

Field CS_KEEP_ACTIVE reader - spi cs line keep low when the bit is set.

CS_KEEP_ACTIVE_W

Field CS_KEEP_ACTIVE writer - spi cs line keep low when the bit is set.

MASTER_CK_SEL_R

Field MASTER_CK_SEL reader - In the master mode spi cs line is enable as spi clk it is combined with spi_cs0_dis spi_cs1_dis spi_cs2_dis.

MASTER_CK_SEL_W

Field MASTER_CK_SEL writer - In the master mode spi cs line is enable as spi clk it is combined with spi_cs0_dis spi_cs1_dis spi_cs2_dis.

MASTER_CS_POL_R

Field MASTER_CS_POL reader - In the master mode the bits are the polarity of spi cs line the value is equivalent to spi_cs ^ spi_master_cs_pol.

MASTER_CS_POL_W

Field MASTER_CS_POL writer - In the master mode the bits are the polarity of spi cs line the value is equivalent to spi_cs ^ spi_master_cs_pol.

R

Register PIN reader

W

Register PIN writer