1#[doc = "Register `MEM_CONF` reader"]
2pub type R = crate::R<MEM_CONF_SPEC>;
3#[doc = "Register `MEM_CONF` writer"]
4pub type W = crate::W<MEM_CONF_SPEC>;
5#[doc = "Field `MEM_PD` reader - Set this bit to power down mem.when reg_mem_pd registers in the 3 uarts are all set to 1 mem will enter low power mode."]
6pub type MEM_PD_R = crate::BitReader;
7#[doc = "Field `MEM_PD` writer - Set this bit to power down mem.when reg_mem_pd registers in the 3 uarts are all set to 1 mem will enter low power mode."]
8pub type MEM_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RX_SIZE` reader - This register is used to configure the amount of mem allocated to receiver's fifo. the default byte num is 128."]
10pub type RX_SIZE_R = crate::FieldReader;
11#[doc = "Field `RX_SIZE` writer - This register is used to configure the amount of mem allocated to receiver's fifo. the default byte num is 128."]
12pub type RX_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
13#[doc = "Field `TX_SIZE` reader - This register is used to configure the amount of mem allocated to transmitter's fifo.the default byte num is 128."]
14pub type TX_SIZE_R = crate::FieldReader;
15#[doc = "Field `TX_SIZE` writer - This register is used to configure the amount of mem allocated to transmitter's fifo.the default byte num is 128."]
16pub type TX_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
17#[doc = "Field `RX_FLOW_THRHD_H3` reader - Refer to the rx_flow_thrhd's description."]
18pub type RX_FLOW_THRHD_H3_R = crate::FieldReader;
19#[doc = "Field `RX_FLOW_THRHD_H3` writer - Refer to the rx_flow_thrhd's description."]
20pub type RX_FLOW_THRHD_H3_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
21#[doc = "Field `RX_TOUT_THRHD_H3` reader - Refer to the rx_tout_thrhd's description."]
22pub type RX_TOUT_THRHD_H3_R = crate::FieldReader;
23#[doc = "Field `RX_TOUT_THRHD_H3` writer - Refer to the rx_tout_thrhd's description."]
24pub type RX_TOUT_THRHD_H3_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
25#[doc = "Field `XON_THRESHOLD_H2` reader - Refer to the uart_xon_threshold's description."]
26pub type XON_THRESHOLD_H2_R = crate::FieldReader;
27#[doc = "Field `XON_THRESHOLD_H2` writer - Refer to the uart_xon_threshold's description."]
28pub type XON_THRESHOLD_H2_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
29#[doc = "Field `XOFF_THRESHOLD_H2` reader - Refer to the uart_xoff_threshold's description."]
30pub type XOFF_THRESHOLD_H2_R = crate::FieldReader;
31#[doc = "Field `XOFF_THRESHOLD_H2` writer - Refer to the uart_xoff_threshold's description."]
32pub type XOFF_THRESHOLD_H2_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
33#[doc = "Field `RX_MEM_FULL_THRHD` reader - Refer to the rxfifo_full_thrhd's description."]
34pub type RX_MEM_FULL_THRHD_R = crate::FieldReader;
35#[doc = "Field `RX_MEM_FULL_THRHD` writer - Refer to the rxfifo_full_thrhd's description."]
36pub type RX_MEM_FULL_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
37#[doc = "Field `TX_MEM_EMPTY_THRHD` reader - Refer to txfifo_empty_thrhd's description."]
38pub type TX_MEM_EMPTY_THRHD_R = crate::FieldReader;
39#[doc = "Field `TX_MEM_EMPTY_THRHD` writer - Refer to txfifo_empty_thrhd's description."]
40pub type TX_MEM_EMPTY_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
41impl R {
42 #[doc = "Bit 0 - Set this bit to power down mem.when reg_mem_pd registers in the 3 uarts are all set to 1 mem will enter low power mode."]
43 #[inline(always)]
44 pub fn mem_pd(&self) -> MEM_PD_R {
45 MEM_PD_R::new((self.bits & 1) != 0)
46 }
47 #[doc = "Bits 3:6 - This register is used to configure the amount of mem allocated to receiver's fifo. the default byte num is 128."]
48 #[inline(always)]
49 pub fn rx_size(&self) -> RX_SIZE_R {
50 RX_SIZE_R::new(((self.bits >> 3) & 0x0f) as u8)
51 }
52 #[doc = "Bits 7:10 - This register is used to configure the amount of mem allocated to transmitter's fifo.the default byte num is 128."]
53 #[inline(always)]
54 pub fn tx_size(&self) -> TX_SIZE_R {
55 TX_SIZE_R::new(((self.bits >> 7) & 0x0f) as u8)
56 }
57 #[doc = "Bits 15:17 - Refer to the rx_flow_thrhd's description."]
58 #[inline(always)]
59 pub fn rx_flow_thrhd_h3(&self) -> RX_FLOW_THRHD_H3_R {
60 RX_FLOW_THRHD_H3_R::new(((self.bits >> 15) & 7) as u8)
61 }
62 #[doc = "Bits 18:20 - Refer to the rx_tout_thrhd's description."]
63 #[inline(always)]
64 pub fn rx_tout_thrhd_h3(&self) -> RX_TOUT_THRHD_H3_R {
65 RX_TOUT_THRHD_H3_R::new(((self.bits >> 18) & 7) as u8)
66 }
67 #[doc = "Bits 21:22 - Refer to the uart_xon_threshold's description."]
68 #[inline(always)]
69 pub fn xon_threshold_h2(&self) -> XON_THRESHOLD_H2_R {
70 XON_THRESHOLD_H2_R::new(((self.bits >> 21) & 3) as u8)
71 }
72 #[doc = "Bits 23:24 - Refer to the uart_xoff_threshold's description."]
73 #[inline(always)]
74 pub fn xoff_threshold_h2(&self) -> XOFF_THRESHOLD_H2_R {
75 XOFF_THRESHOLD_H2_R::new(((self.bits >> 23) & 3) as u8)
76 }
77 #[doc = "Bits 25:27 - Refer to the rxfifo_full_thrhd's description."]
78 #[inline(always)]
79 pub fn rx_mem_full_thrhd(&self) -> RX_MEM_FULL_THRHD_R {
80 RX_MEM_FULL_THRHD_R::new(((self.bits >> 25) & 7) as u8)
81 }
82 #[doc = "Bits 28:30 - Refer to txfifo_empty_thrhd's description."]
83 #[inline(always)]
84 pub fn tx_mem_empty_thrhd(&self) -> TX_MEM_EMPTY_THRHD_R {
85 TX_MEM_EMPTY_THRHD_R::new(((self.bits >> 28) & 7) as u8)
86 }
87}
88#[cfg(feature = "impl-register-debug")]
89impl core::fmt::Debug for R {
90 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
91 f.debug_struct("MEM_CONF")
92 .field("mem_pd", &self.mem_pd())
93 .field("rx_size", &self.rx_size())
94 .field("tx_size", &self.tx_size())
95 .field("rx_flow_thrhd_h3", &self.rx_flow_thrhd_h3())
96 .field("rx_tout_thrhd_h3", &self.rx_tout_thrhd_h3())
97 .field("xon_threshold_h2", &self.xon_threshold_h2())
98 .field("xoff_threshold_h2", &self.xoff_threshold_h2())
99 .field("rx_mem_full_thrhd", &self.rx_mem_full_thrhd())
100 .field("tx_mem_empty_thrhd", &self.tx_mem_empty_thrhd())
101 .finish()
102 }
103}
104impl W {
105 #[doc = "Bit 0 - Set this bit to power down mem.when reg_mem_pd registers in the 3 uarts are all set to 1 mem will enter low power mode."]
106 #[inline(always)]
107 pub fn mem_pd(&mut self) -> MEM_PD_W<MEM_CONF_SPEC> {
108 MEM_PD_W::new(self, 0)
109 }
110 #[doc = "Bits 3:6 - This register is used to configure the amount of mem allocated to receiver's fifo. the default byte num is 128."]
111 #[inline(always)]
112 pub fn rx_size(&mut self) -> RX_SIZE_W<MEM_CONF_SPEC> {
113 RX_SIZE_W::new(self, 3)
114 }
115 #[doc = "Bits 7:10 - This register is used to configure the amount of mem allocated to transmitter's fifo.the default byte num is 128."]
116 #[inline(always)]
117 pub fn tx_size(&mut self) -> TX_SIZE_W<MEM_CONF_SPEC> {
118 TX_SIZE_W::new(self, 7)
119 }
120 #[doc = "Bits 15:17 - Refer to the rx_flow_thrhd's description."]
121 #[inline(always)]
122 pub fn rx_flow_thrhd_h3(&mut self) -> RX_FLOW_THRHD_H3_W<MEM_CONF_SPEC> {
123 RX_FLOW_THRHD_H3_W::new(self, 15)
124 }
125 #[doc = "Bits 18:20 - Refer to the rx_tout_thrhd's description."]
126 #[inline(always)]
127 pub fn rx_tout_thrhd_h3(&mut self) -> RX_TOUT_THRHD_H3_W<MEM_CONF_SPEC> {
128 RX_TOUT_THRHD_H3_W::new(self, 18)
129 }
130 #[doc = "Bits 21:22 - Refer to the uart_xon_threshold's description."]
131 #[inline(always)]
132 pub fn xon_threshold_h2(&mut self) -> XON_THRESHOLD_H2_W<MEM_CONF_SPEC> {
133 XON_THRESHOLD_H2_W::new(self, 21)
134 }
135 #[doc = "Bits 23:24 - Refer to the uart_xoff_threshold's description."]
136 #[inline(always)]
137 pub fn xoff_threshold_h2(&mut self) -> XOFF_THRESHOLD_H2_W<MEM_CONF_SPEC> {
138 XOFF_THRESHOLD_H2_W::new(self, 23)
139 }
140 #[doc = "Bits 25:27 - Refer to the rxfifo_full_thrhd's description."]
141 #[inline(always)]
142 pub fn rx_mem_full_thrhd(&mut self) -> RX_MEM_FULL_THRHD_W<MEM_CONF_SPEC> {
143 RX_MEM_FULL_THRHD_W::new(self, 25)
144 }
145 #[doc = "Bits 28:30 - Refer to txfifo_empty_thrhd's description."]
146 #[inline(always)]
147 pub fn tx_mem_empty_thrhd(&mut self) -> TX_MEM_EMPTY_THRHD_W<MEM_CONF_SPEC> {
148 TX_MEM_EMPTY_THRHD_W::new(self, 28)
149 }
150}
151#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mem_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
152pub struct MEM_CONF_SPEC;
153impl crate::RegisterSpec for MEM_CONF_SPEC {
154 type Ux = u32;
155}
156#[doc = "`read()` method returns [`mem_conf::R`](R) reader structure"]
157impl crate::Readable for MEM_CONF_SPEC {}
158#[doc = "`write(|w| ..)` method takes [`mem_conf::W`](W) writer structure"]
159impl crate::Writable for MEM_CONF_SPEC {
160 type Safety = crate::Unsafe;
161}
162#[doc = "`reset()` method sets MEM_CONF to value 0x88"]
163impl crate::Resettable for MEM_CONF_SPEC {
164 const RESET_VALUE: u32 = 0x88;
165}